ARM9 based 35sbc

APC-7110 Series Single Board Computer (APC-7112 ~APC-7117)

Introduction

This Chapter gives background information on the APC-7110 series SBCs.

Section include：

• APC embedded ARM computer line family
• Comparison of APC-7110 series SBCs
• Block diagram
• Snapshots

APC-7110 Series Embedded ARM Computer Family

APC embedded ARM computers are a new concept, reliable, low power and powerful embedded ARM based 3.5” SBC family of Embedian. Every attempt is made to make it easy to use and like the experiences in x86 compatible SBC systems. Usually, users only need to re-compile the original source code.

The APC product line is designed to meet the needs of embedded networking and graphical systems developers. These embedded ARM computer line family allow the use of the same chassis over the whole product line and maximize design reuse. APC embedded ARM computer use the on-board CPU, flash memory and SDRAM. The SBCs themselves only need DC 5V to boot up.

Comparison of APC-7110 Series SBC

APC-7110 series SBC families host a Samsung S3C2440A SOC (ARM920T core) clocking at 400Mhz with MMU and AMBA BUS.

The differences between each model are listed in the following table. Users could decide the best features and choose the right model number.

Table 1.1

• Note 1：

The above table could be interpreted as：

1. APC-7113 = APC7112 + IDE interface
2. APC-7116 = APC-7112 + SM502 graphic chip
3. APC-7117 = APC-7116 + IDE interface

• Note 2：
  • (*) NOR Flash stores a "NAND Flash Writer" program to protect user erase bootloader accidentally. Details see "Dual-BIOS Design" at Chapter 4.
  • (**) 128MB SDRAM is available on project based.
  • (***) For LCD driven by CPU LCD controller, the recommended resolutions are 640x480 or less. For LCD driven by SM502, the recommended resolutions are 1280x1024 or 1366x768 or less.

The APC-7110 series embedded ARM computer line families are designed in a 3.5" industrial standard form factor.

APC-7110 Series Block Diagram

The block diagram illustrated here is APC-7117. Others in this series are just a subset of APC-7117.

Figure 1.1 APC-7110 Series SBC Block Diagram

Details for this diagram will be explained in the following chapters.

Snapshot of APC-7110 series SBC

Figure 1.2 gives some snapshots of APC-7110 Series SBC

Figure 1.2 Snapshot of SBC

Specifications

This Chapter contains specifications of APC-7110 series SBCs.

Section include：

• Functional specifications
• Mechanical specifications
• Electrical specifications
• Environmental specifications
• MTBF
• EMI/RFI and ESD protection

Functional Specification

Processor

• On-board Samsung S3C2440A
• 32-bit ARM920T Core
• Clock Rates up to 400Mhz
• 133Mhz System BUS
• Voltage and Frequency Scaling
• Booting from NAND Flash

Power Supply

• +5V only for SBC
• +12V bypass connection to backlight inverter board or other external devices via the mini-ATX connector
• Real-time clock battery powered

Memory

• Onboard 64MB NAND Flash
• Onboard 64MB SDRAM (32-bit), 128MB SDRAM available on project based
• CompactFlash(CF), Type I and Type II, 3.3V, True IDE Mode

Universal Serial Bus (USB)

• Chipset：CPU internal
• Four USB 1.1 host ports (12Mbit/s speed), Type A connector on board
• OHCI Rev. 1.0 Compliance
• USB Hub as model option
• USB legacy keyboard, mouse and hard disk support

USB Device

• Chipset：CPU internal
• One USB client port, Type B connector onboard
• Compatible with USB specification version v.1.1

Serial Console Port

• Chipset：CPU internal
• One 5-wire RS-232, RJ-45 Connector onboard

COM Port

• Chipset：TI TL16c752B
• Four full (9-wire) RS-232 ports, Two 10x2-pin Header
• One RS232/422/485 (5-wire) port, 7x2-pin Header

Ethernet

• Chipset：Davicom DM9000B
• One 10/100Mbps Ethernet (MAC integrated), RJ-45 connector onboard
• Compliance with IEEE 802.3u 100Base-TX and 802.3 10Base –T
• Compliance with IEEE 802.3u auto-negotiation protocol for automatic link-type selection
• Full-duplex/half -duplex capability
• Supports IEEE 802.3x full duplex flow control
• Support Auto-MDIX

CompavtFlash(CF) Socket

• Chipset：CPU Memory Bus
• One CF socket onboard
• Type I and Type II, 3.3V
• True IDE mode

Audio

• Chipset：Realtek ALC203 Codec
• AC97 version 2.3 compliance interface
• High SNR (>100dB), 3D Stereo Enhancement
• Stereo Microphone Input
• Headphone Output
• Advanced Linux Sound Architecture (ALSA) API support

Discrete I/O

• 12 general-purpose digital I/Os

Watchdog Timer (WDT)

• Chipset：CPU internal
• 16-bit Watchdog Timer
• Interrupt Request or System Reset at Timeout

CPU Video Graphic Array (VGA)

• Chipset：CPU internal
• TFT Panel Support
• 640 x 480 resolution for best performance
• 65,000 color support
• TTL and 18-bit LVDS interface

SM502 Video Graphic Array (VGA)

• Chipset：Silicon Motion SM502
• Single channel LVDS Panel Support
• 1280 x 1024 resolution
• 260,000 color support
• External 8MB SDRAM onboard
• 24-bit LVDS and CRT interface (18-bit available)

IDE Interface

• Chipset：CPU Memory Bus
• 44-pin Header

Buzzer

• Chipset：Advanced Acoustic Technology AS9051
• Rated Frequency at 2731 + 200 Hz
• PWM Frequency Control
• Sound Output：85dBA (min)

Touch Panel Interface

• Chipset：CPU Internal
• 10-bit CMOS ADC
• 4-wire FPC connector onboard

JTAG

• Male 2.54 mm 2x7 header

Real Time Clock (RTC) with on board Battery

BIOS

• Universal Bootloader (u-boot)
• Serial or Ethernet TFTP download
• Booting from NAND Flash Technology

Operating System

• Linux 2.6.18.1 (Debian ARM Linux)
• Windows CE 5.0

Mechanical Specification

The APC-7110 series embedded ARM computer boards is standard 3.5" (102mm x 145mm) form factor in size. This section describes the component dimensions and mounting of the board. Detailed drawings are available from Embedian for production customers.

Dimension

Length x Width: 102mm x 145mm (4.0" x 5.7")

Mechanical Drawing

The following mechanical drawing specifies the dimension of APC-7110 series, as well as key components on the board. All dimensions are in mini-meters.

Top View

Bottom View

Mounting Holes

Four mounting holes are provided for mounting. The diameter of the holes is 4.0 mm. Mounting holes are plated through and connected to the APC-7110 series SBC ground plane.

For reliable ground connections, use locking washers (star or split) when securing an APC-7110 series SBC in an enclosure. Make sure that the washers do not extend beyond the limits of the pads provided.

Clearances

The APC-7110 series SBC has a low profile. It can fit in an enclosure with inside dimensions as thin as 23.9 mm. Key clearances are as follows:

Height on Top

Max 16.55mm (0.65")

Height on Bottom

Maximum 5.75mm (0.23")

Board Thickness

1.6mm (0.06")

Clearance over Top and Bottom

23.9mm (0.94")

Note: Selection of connectors and wiring harnesses will determine height of final assembly.

Weight

About 120g.

Electrical Specification

Supply Voltage

• +5V AT/ATX power or
• +5V DC +(-)5%

APC-7110 series embedded ARM computer boards are equipped with +5V DC only. (+5V AT/ATX power supply or +5V DC power supply). If users use AT/ATX power supply, it only requires +5V. The voltages +12V, -12V and –5V are not required to operate the APC-7110 series SBC, but might need for other external devices. APC-7110 series SBC also provides with a +12 V bypass connection to backlight inverter board controller or other devices that need +12V.

Supply Voltage Ripple

100mV peak to peak 0 - 20MHz

Supply Current (Typical)

APC-7110 series SBC is a low power consumption embedded computer. The power-consumption tests were executed to give an overview of the electrical conditions for several operational states. The board used a 64MB onboard SDRAM. Following table lists the typical power consumption of each APC-7110 series SBC. All I/Os are up under the testing environment.

Table 2.1 Power Consumption of APC-7110 series SBC

Note: The tested LCD resolutions are 6.4" 640x480.

Real-Time Clock (RTC) Battery

• Voltage range: 1.8V – 43.6V (Typical@3.0V)
• Quiescent current: max. 3uA@3.0 V
• Normal Capacity：1.5mAh

CompactFlash(CF)

• 3.3V only

LCD

The LCD signal control voltage specification is as follows.

• +3.3/5V for TTL level LCD Panel (by Jumper Setting)
• +3.3/5V for LVDS LCD Panel (by Jumper Setting)

Environmental Specification

Temperature

• Operating: 0^o C to +70^o C(*) (with appropriate airflow)
• Non-operating: -10 ^oC to +85 ^o C (non-condensing)

Note: (*) The maximum operating temperature is the maximum measurable temperature on any spot on the SBC's surface. You must maintain the temperature according to the above specification.

Humidity

• Operating: 0 to 95% (non-condensing)
• Non-operating: 0 to 95% (non-condensing)

MTBF

• System MTBF (hours) : >100,000 hours

The above MTBF (Mean Time Between Failure) values were calculated using a combination of manufacturer's test data, if the data was available, and a Bellcore calculation for the remaining parts. The Bellcore calculation used is "Method 1 Case 1". In that particular method the components are assumed to be operating at a 50 % stress level in a 40^o C ambient environment and the system is assumed to have not been burned in. Manufacturer's data has been used wherever possible. The manufacturer's data, when used, is specified at 50^oC, so in that sense the following results are slightly conservative. The MTBF values shown below are for a 40^oC in an office or telecommunications environment. Higher temperatures and other environmental stresses (extreme altitude, vibration, salt water exposure, etc.) lower MTBF values.

EMI/RFI and ESD Protection

The APC-7110 series SBC incorporates a number of standard features that protect it from electrostatic discharge (ESD) and suppress electromagnetic and radio-frequency interference (EMI/RFI). Transient voltage suppressors, EMI fences, filters on I/O lines and termination of high-frequency signals are included standard on all systems.

APC-7110 series SBC provides surge protection on the input power lines of itself. This is especially important if the power supply wires will be subject to EMI/RFI or ESD. If the system incorporates other external boards, it is the responsibility of the designer or integrator to provide surge protection on the system input power lines.

Hardware Reference

This section gives details of the hardware features of the APC-7110 series SBC. These include a description of the switches, jumper settings, connectors and connector pin outs.

Jumpers

The APC-7110 series SBC has a number of jumpers that allow you to configure your system to suit your application. All use 2mm shorting blocks (shunts) to select settings. Turn off power of the APC-7110 series SBC before changing the position of a shunt.

Jumper Location

Figure 3.1 Jumper Location

List of Jumpers

The table below lists the function of various jumpers.

Table 3.1 Jumpers

Jumper Settings

The following tables describe how the jumper shunts to various configurations.

JP2: Location on Board, E3

Table 3.2 NOR Boot or NAND Boot and LCD Scan Direction Setting(JP2)

Table 3.2	NOR Boot or NAND Boot and LCD Scan Direction Setting
	Setting	Function
N.C.(Default)	NAND Boot
JP2(1-2)	NOR Boot
JP2(3-4)	Pull-High of CN22 Pin 30
JP2(5-6)	Pull-High of CN22 Pin 31

The 3-4 and 5-6 of JP2 is to set the panel scan direction if panel is connected from CPU LCD controller.

APC-7110 series SBC supports boot from NAND flash. The processor copies the first page of NAND flash to SDRAM. That means it can boot without a NOR flash. However, a 0.5MB NOR flash is added by a jumper setting to prevent the bootloader from being erased by developers. A "NAND Flash Writer" program is stored in NOR flash to recover the contents in NAND without using ICE.

The "NAND Flash Writer" download from USB of host PC and write binaries to NAND flash in seconds. Details will be described in next chapter.

JP4: Location on Board, C2

Table 3.3 LCD VCC Power Setting for CN21 (JP4) (from CPU LVDS and TTL)

Table 3.3	LCD VCC Power Setting for CN21 (JP4) (from CPU LVDS and TTL)
	Setting	Function
JP4(1-2)(Default)	3.3V
JP4(3-4)	5V

JP5: Location on Board, F2

Table 3.4 LCD VCC Power Setting for CN20 (JP5) (from SM502 LDVS)

Table 3.4	LCD VCC Power Setting for CN20 (JP5) (from SM502 LDVS)
	Setting	Function
JP5(1-2)(Default)	3.3V
JP5(3-4)	5V

JP6: Location on Board, D8

Table 3.5 RS232/422/485 Mode Setting

Table 3.5	RS232/422/485 Mode Setting
	Setting	Function
JP6(1-2)(Default)	RS232
JP6(3-4)	RS422/RS485 half duplex
JP6(5-6)	RS422/RS485 full duplex"'

Note: RS232, RS422 and RS485 of CN10 can only choose one at the same time.

S1: Location on Board, A7

Table 3.6 Reset Button

Table 3.6	Reset Button
	Setting	Function
Press Button and Release Immediately	Reset CPU and I/O

Setting Jumpers

You configure your board to match the needs of your application by setting jumpers. A jumper is the simplest kind of electric switch. It consists of two metal pins and a small metal clip (often protected by a plastic cover) that slides over the pins to connect them. To "close" a jumper you connect the pins with the clip.

To "open" a jumper you remove the clip. Sometimes a jumper will have three pins, labeled 1, 2 and 3. In this case you would connect either pins 1 and 2 or 2 and 3.

The jumper settings are schematically depicted in this manual as follows.

A pair of needle-nose pliers may be helpful when working with jumpers. If you have any doubts about the best hardware configuration for your application, contact your local distributor or sales representative before you make any change.

Generally, you simply need a standard cable to make most connections.

Connectors

Onboard connectors link the APC-7110 series SBC to external devices such as LCD panel, a keyboard, an audio headset or CompactFlash and to external communication such as 802.11, USB or Ethernet link. The table below lists the function of each of the board's connectors.

Connector Location

Figure 3.2 Top Side of Connector Location

Top Side

Bottom Side

List of Connectors

Table 3.7 List of Connectors

Connector Pin Assignments

The following tables describe the electrical signals available on the connectors of the APC-7110 series SBC. Each section provides relevant details about the connector including part numbers, mating connectors, signal descriptions and references to related chapters. For precision measurements of the location of the connectors on the SBC, refer to section 2.2.2. for mechanical drawing.

Legend:

Signal Types:

USB Host Port：CN13 and CN14

Four onboard USB host interfaces are available through the double port connector CN13 (8 pins) and CN14 (8pins). All USBs are OHCI Rev. 1.0 compliance.

The following table shows the pin outs of USB connector.

CN13: Location on Board, E6

Table 3.8 Double USB Connector

Table 4.8	Double USB Connector (CN13)
Description	USB Type A
Header	Pin	Signal Name	Function	Type
	1	USB1_5V(*)	USB1 -supply (max. 500mA)	PO
2	USB1-	Universal serial bus port 1 (-)	IO
3	USB1+	Universal serial bus port 1 (+)	IO
4	USB_GND	USB Ground	P
5	USB2_5V(*)	USB2 -supply (max. 500mA)	PO
6	USB2-	Universal serial bus port 2 (-)	IO
7	USB2+	Universal serial bus port 2 (+)	IO
8	USB_GND	USB Ground	P

CN14: Location on Board, E5

Table 3.9 Double USB Connector

Table 4.9	Double USB Connector (CN14)
Description	USB Type A
Header	Pin	Signal Name	Function	Type
	1	USB3_5V(*)	USB3 -supply (max. 500mA)	PO
2	USB3-	Universal serial bus port 3 (-)	IO
3	USB1+	Universal serial bus port 3 (+)	IO
4	USB_GND	USB Ground	P
5	USB4_5V(*)	USB4 -supply (max. 500mA)	PO
6	USB4-	Universal serial bus port 4 (-)	IO
7	USB4+	Universal serial bus port 4 (+)	IO
8	USB_GND	USB Ground	P

Note:

(*) To protect the external power lines of peripheral devices, make sure that:

-- The wires have the right diameter to withstand the maximum available current.

-- The enclosure of the peripheral device fulfills the fire-protecting requirements of IEC/EN 60950.

The USB power lines are protected with a resetable fuse and are limited to 500mA.

If the USB device is powered from the SBC directly, not from the external power, make sure that the total power consumption does not exceed the DC power budget of the SBC. For example, you might need to use a 5V/2A adapter instead of 5V/1A for APC-7110 series SBC.

10/100Mbps Ethernet Port: CN12

The APC-7110 series SBC on-board Ethernet interface uses the Davicom DM9000B integrated PHY. This combination supports a 10/100Base-T interface. The device auto-negotiates the use of a 10Mbit/sec or 100Mbit/sec connection.

The 10/100Base-T connector is a standard 8 -pin RJ45 jack (CN12) with integrated LEDs for link and speed. The link LED is blinking on activity.

The following table shows the pin-out of the Ethernet connector.

CN12: Location on Board, E7

Table 3.10 Ethernet Connector

Table 3.10	Ethernet Connector (CN12)
Description	RJ45 Connector
Header	Pin	Signal Name	Function	Type
	1	TXD+	Transmit Data+	Differential Output
2	TXD-	Transmit Data-	Differential Output
3	RXD+	Receive Data+	Differential Input
4	NC	Not Connected
5	NC	Not Connected
6	RXD-	Receive Data-	Differential Input
7	NC	For internal use only
8	NC	For internal use only
L	Left LED	Duplex	Yellow
R	Right LED	Link and Ack	Green

Graphic Interfaces: CN21, CN22, CN20 and CN18

The APC-7110 series SBC use the graphics accelerator integrated in the CPU and/or SMI502 graphic chip, which delivers high-performance 2D capabilities. For SM502 enhanced SBCs, APC-7116 and APC-7117 also provide with an onboard external 8MB of SDRAM are used as video memory.

The graphic interface from CPU LCD controller supports TTL level FPC connector and LVDS connector. The recommend resolution is 640 x 480 or less. The graphic interface from SM502 chip supports LVDS connector and CRT connector. The recommend resolution is 1280x1024 or less.

The following table shows the pin-out of the graphic interface connector.

CN21: Location on Board, F1

Table 3.11 LVDS Connector (From CPU LCD Controller)

Table 3.11	LVDS Connector (CN21) (From CPU LCD Controller)
Description	*CONN. DF14-20P-1.25H
Header	Pin	Signal Name
	1	GND
2	GND
3	NC
4	NC
5	GND
6	CLKP
7	CLKM
8	GND
9	A2P
10	A2M
11	GND
12	A1P
13	A1M
14	GND
15	A0P
16	A0M
17	GND
18	GND
19	VCC (3.3V or 5V)
20	VCC (3.3V or 5V)

Note: (*) CN21 is the 18-bit LVDS signal from CPU LCD controller. In the 18-bit single pixel mode, the RGB and control inputs shall be transmitted as shown in Figure 3.4. Outputs A3 through A7 and CLK2 shall be inactive in this mode and fixed at a single value.

Figure 3.4 18-bit Single Pixel Transmission

1. The model number of the CN21 socket is DF14-20P-1.25H (Hirose Electric Co., Ltd.).

CN22: Location on Board, D1/E1

Table 3.12 TTL Level FPC Connector from CPU LCD

Table 3.12	CPU TTL Level FPC Connector (CN22)
Description	33-pin FPC connector pitch 0.5mm
Header	Pin	Signal Name	Function
	1	GND	Ground
2	VCLK	Pixel Clock
3	HSYNC	Horizontal Sync.
4	VSYNC	Vertical Sync.
5	GND	Ground
6	R0	Red Data
7	R1
8	R2
9	R3
10	R4
11	R5
12	GND	Ground
13	G0	Green Data
14	G1
15	G2
16	G3
17	G4
18	G5
19	Ground	GND
20	B0	Blue Data
21	B1
22	B2
23	B3
24	B4
25	B5
26	GND	Ground
27	DE	Data Enable
28	VCC	Power Supply
29	VCC	Power Supply
30	R/L	Horizontal Image Shift-direction Select Signal
31	U/D	Vertical Image Shift-direction Select Signal
32	NC	Not Connected
33	NC	Not Connected

Note:

1. The model number of the CN22 socket is 33-pin FPC connector pitch 0.5mm

CN20: Location on Board, G1

Table 3.13 SM502 LVDS Connector (CN20)

Table 3.13	SM502 LVDS Connector (CN20)
Description	*CONN. DF14-20P-1.25H
Header	Pin	Signal Name(*)
	1	GND
2	GND
3	A3P
4	A3M
5	GND
6	CLKP
7	CLKM
8	GND
9	A2P
10	A2M
11	GND
12	A1P
13	A1M
14	GND
15	A0P
16	A0M
17	GND
18	GND
19	VCC (3.3V or 5V)
20	VCC (3.3V or 5V)

Note: (*)CN20 is the 24-bit LVDS signal from SM502 graphic chip. In the 24-bit single pixel mode, the RGB and control inputs shall be transmitted as shown in Figure 3.5. Outputs A4 through A7 and CLK2 shall be inactive in this mode and fixed at a single value. Bits marked RES are reserved for future use and may take any value.

Figure 3.5 24-bit Single Pixel Transmission

1. The model number of the CN20 socket is DF14-20P-1.25H (Hirose Electric Co., Ltd.).

CN18: Location on Board, E2

Table 3.14 SM502 CRT Connector

Table 3.14	SM502 CRT Connector (CN18)
Description	DSUB15 Female Connector
Header	Pin	Signal Name	Function
	1	Red	Red Video
2	Green	Green Video
3	Blue	Blue Video
4	NC	Not Connected
5	GND	Ground
6	GND	Ground
7	GND	Ground
8	GND	Ground
9	NC	Not Connected
10	GND	Ground
11	NC	Not Connected
12	DDA	DDC Serial Data Line
13	HSYNC	Horizontal Sync
14	VSYNC	Vertical Sync
15	DCK	DDC Data Clock Line

Display Power Consideration

When using a LCD Panel, additional voltages may be required to drive the display's logic and to supply the backlight converter and the display's contrast voltage.

The display logic may require +5V for standard or +3.3V for low -power LCDs. Contrast voltages for passive displays are normally very different and can range from – 30V to +30V. Backlight converters usually are +5V or +12V types.

Even though the APC-7110 series SBC is also available as a +5V-only board, you need to supply the +12V for the backlight converter additionally when using such a converter type.

Audio Port：CN16 and CN15

The APC-7110 series SBC uses the ALC203 AC97 Codec from the AC-link interface of CPU. The Audio port interface is a headset and microphone audio jack. The audio of APC-7110 series SBC is AC'97 2.3 compatible stereo audio CODEC, including host/soft audio, and AMR/CNR based designs.

The codec could achieve a high SNR (greater than 100 dB), sensing logics for device reporting. The AC'97 CODEC supports multiple CODEC extensions with independent variable sampling rates and built-in 3D effects.

The following table shows the pin-out of the Audio connector.

CN16: Location on Board, E3

Table 3.15 Audio Headset Phone Connector

Table 3.15	Audio Connector (CN16)
Description	3.5mm Audio Jack
Header	Pin	Signal Name	Function	Type
	1	Audio Out	Headset Phone Output	O

CN15: Location on Board, E4

Table 3.16 Audio Microphone Connector

Table 3.16	Audio Connector (CN16)
Description	3.5mm Audio Jack
Header	Pin	Signal Name	Function	Type
	1	Mic. In	Microphone Input	I

Serial Communication Port: CN6, CN8, CN9 and CN10

APC-7110 series SBC provides with one serial console port, one RS232/422/485 port, and four full RS232 ports (depending on models). The serial console port is available through a RJ-45 connector. (CN6) The RS232/422/485 is available through CN10. (14-pin header) The four full serial ports are available through the double port connector CN8 (20-pin header) and CN9 (20-pin header).

The following table shows the pin-out of the serial connector.

CN6: Location on Board, A7

Table 3.17 Serial Console Connector

Table 3.17	Serial Console Connector (CN6)
Description	8-pin RJ45 Connector
Header	Pin	Signal Name	Function	Type
	1	NC	Not Connected
2	RXD	Receive Data	I
3	TXD	Transmit Data	O
4	NC	Not Connected
5	GND	Ground	P
6	NC	Not Connected
7	RTS	Ready To Send	O
8	CTS	Clear to Send	I

Note:

A RJ-45 to RS-232 connector is also available from Embedian.

CN10: Location on Board, D8

Table 3.18 RS232/422/485 Connector

Table 3.18	COM5 RS232/422/485 Connector (CN10)
Description	HEADER DIP 7*2P 180D MALE 2.0mm
Header	Pin	RS232	RS422	RS485
	1	NC	NC	NC
2	NC	NC	NC
3	RXD	NC	NC
4	RTS	NC	NC
5	TXD	NC	NC
6	CTS	NC	NC
7	NC	NC	NC
8	NC	NC	NC
9	GND	GND	GND
10	Shield	Shield	Shield
11	NC	TXD+	TXD+
12	NC	TXD-	TXD-
13	NC	RXD+	RXD+
14	NC	RXD-	RXD-

Note:

A box header to RS232/422/485 connector is also available from Embedian.

CN8: Location on Board, A8/B8

Table 3.19 Double Full RS232 Connector

Table 3.19	Double Full Rs232 Connector (CN8)
Description	HEADER DIP 10*2P 180D MALE 2.0mm
Header	Pin	Signal Name	Function	Type
	1	DCD1	Data Carrier Detect	I
2	DSR1	Data Set Ready	I
3	RXD1	Receive Data	I
4	RTS1	Ready to Send	O
5	TXD1	Transmit Data	O
6	CTS1	Clear to Send	I
7	DTR1	Data Terminal Ready	O
8	RI1	Ring Indicator	I
9	GND1	Ground	P
10	Shield	Ground Earth	P
11	DCD2	Data Carrier Detect	I
12	DSR2	Data Set Ready	I
13	RXD2	Receive Data	I
14	RTS2	Ready to Send	O
15	TXD2	Transmit Data	O
16	CTS2	Clear to Send	I
17	DTR2	Data Terminal Ready	O
18	RI2	Ring Indicator	I
19	GND2	Ground	P
20	Shield	Ground Earth	P

CN9: Location on Board, C8

Table 3.20 Double Full RS232 Connector

Table 3.20	Double Full Rs232 Connector (CN9)
Description	HEADER DIP 10*2P 180D MALE 2.0mm
Header	Pin	Signal Name	Function	Type
	1	DCD3	Data Carrier Detect	I
2	DSR3	Data Set Ready	I
3	RXD3	Receive Data	I
4	RTS3	Ready to Send	O
5	TXD3	Transmit Data	O
6	CTS3	Clear to Send	I
7	DTR3	Data Terminal Ready	O
8	RI3	Ring Indicator	I
9	GND3	Ground	P
10	Shield	Ground Earth	P
11	DCD42	Data Carrier Detect	I
12	DSR4	Data Set Ready	I
13	RXD4	Receive Data	I
14	RTS4	Ready to Send	O
15	TXD4	Transmit Data	O
16	CTS4	Clear to Send	I
17	DTR4	Data Terminal Ready	O
18	RI4	Ring Indicator	I
19	GND4	Ground	P
20	Shield	Ground Earth	P

CompactFlash (CF) Socket: CN25

The CompactFlash socket CN25 (50 pins) for commercial CompactFlashes (Type I and II) is integrated on the top side of the APC-7110 series SBC. The interface is also a hot-plug capable interface.

The following table shows the pin-out of the CompactFlash socket.

CN25: Location on Board, B2/C2

Table 3.21 CompactFlash Connector

Table 3.21	CompactFlash Connector (CN25)
Description	CF Connector
Header	Pin	Signal Name	Function	Type
	1	GND	Ground	P
2	D3	Data 3	IO
3	D4	Data 4	IO
4	D5	Data 5	IO
5	D6	Data 6	IO
6	D7	Data 7	IO
7	nCE1	High Byte Chip Select	O
8	A10	Address 10	O
9	nOE	Memory Read	O
10	A9	Address 9	O
11	A8	Address 8	O
12	A7	Address 7	O
13	VCC	External Switched CardB Power Input	PI
14	A6	Address 6	O
15	A5	Address 5	O
16	A4	Address 4	O
17	A3	Address 3	O
18	A2	Address 2	O
19	A1	Address 1	O
20	A0	Address 0	O
21	D0	Data 0	IO
22	D1	Data 1	IO
23	D2	Data 2	IO
24	WP_nIOIS16	16 Bit Access	I
25	nCD2	Card Detest 2Memory Read	I
26	nCD1	Card Detect 1	I
27	D11	Data 11	IO
28	D12	Data 12	IO
29	D13	Data 13	IO
30	D14	Data 14	IO
31	D15	Data 15	IO
32	nCE2	Low Byte Chip Select	O
33	nVS1	Voltage Sense 1 Input	I
34	nIORD	IO Read	O
35	nIOWR	IO Write	O
36	nWE(nMWR)	Memory Write	I
37	Ready_nIRQ	Interrupt Signal	P
38	VCC	Card Power	I
39	nCARDSEL	Card Select	O
40	nVS2	Voltage Sense 2 Input	I
41	CF_RESET	Reset	I
42	nWait_CF	Wait	I
43	nINPACK	Interrupt Acknowledge	I
44	nREQ	Register Access	O
45	BVD2_nSPKR	Speaker Input	IO
46	BVD1_nSTSCHG	Status Change	IO
47	D8	Data 8	IO
48	D9	Data 9	IO
49	D10	Data 10	IO
50	GND	Ground	P

IDE Connector: CN4

The following table shows the pin outs of the IDE connector.

CN4: Location on Board, A3/A4/A5

Table 3.22 IDE Connector

Table 3.22	IDE Connector (CN4)
Description	HEADER DIP 2*22P 180D MALE 2.0mm
Header	Pin	Signal Name(*)
	1	IDE RESET
2	GND
3	DATA7
4	DATA8
5	DATA6
6	DATA9
7	DATA5
8	DATA10
9	DATA4
10	DATA11
11	DATA3
12	DATA12
13	DATA2
14	DATA13
15	DATA1
16	DATA14
17	DATA0
18	DATA15
19	GND
20	NC
21	DRQ
22	GND
23	IO WRITE
24	GND
25	IO READ
26	GND
27	H/D READY
28	NC
29	HDACK 0
30	GND
31	IDE IRQ
32	OCS16
33	ADDR1
34	NC
35	ADDR0
36	ADDR2
37	HARD DISK SELECT 0
38	HARD DISK SELECT 0*
39	DE ACTIVE
40	GND
41	DC 5V
42	DC 5V
43	GND
44	NC

LCD Backlight Inverter Connector: CN2

The following table shows the pin outs of the LCD backlight inverter connector.

CN2: Location on Board, A2

Table 3.23 LCD Backlight Inverter Connector

Table 3.23	LCD Backlight Inverter Connector (CN2)
Description	WAFER BOX 2.0mm 5P 180D MALE W/LOCK
Header	Pin	Signal Name	Function	Type
	1	EXT 12V	Power supply for backlight inverter	PO
2	GND	Ground	P
3	Enable	On/off control for backlight inverter	O
4	PWM1	Brightness control for backlight inverter	IO
5	PWM2	IO

4-Wire LCD Touch Panel Connector: CN19

Touch panel could be interfaced from COM or USB. APC-7110 series SBC also provides with a 4-wire FPC connector for touch panel. The controller is from the ADC of the processor.

The following table shows the pin-out of the touch panel connector.

CN19: Location on Board, A1

Table 3.24 4-wire LCD Touch Panel Connector

Table 3.24	4-Wire LCD Touch Panel Connector (CN19)
Description	1.0 ZIF FPC SMT V/T
Header	Pin	Signal Name	Function
	1	XM	Left
2	YP	Bottom
3	XP	Right
4	YM	Top

Note:

CN19 is a TTL-level signal. If the panel is in a distance of the SBC, we recommend you to use the COM or USB interface.

USB Device Port: CN5

One USB specification version 1.1 compatible USB device port is on board.

The following table shows the pin-out of the USB device connector.

CN5: Location on Board, A6

Table 3.25 USB Device Connector (CN5)

Table 3.25	USB Device Connector
Description	USB Type B Female Connector
Header	Pin	Signal Name	Function	Type
	1	+5V	Power Supply	PO
2	Data+	Data+	IO
3	Data-	Data-	IO
4	GND	Ground	P

GPIO Connector：CN11

The board supports 12-bit GPIO through GPIO connector. (CN11) The 12 digital in- and out-puts can be programmed to read or control devices, with input or output defined.

The following table shows the pin-out of the GPIO connector.

CN11: Location on Board, E8

Table 3.26 GPIO Connector (CN11)

Table 3.26	GPIO Connector
Description	HEADER DIP 7*2P 180D MALE 2.0mm
Header	Pin	Signal Name	Function	Type
	1	VCC (+3.3V)	Power Supply	PO
2	GND	Ground	P
3	GPIO1	GPIO	IO
4	GPIO7	IO
5	GPIO2	IO
6	GPIO8	IO
7	GPIO3	IO
8	GPIO9	IO
9	GPIO4	IO
10	GPIO10	IO
11	GPIO5	IO
12	GPIO11	IO
13	GPIO6	IO
14	GPIO12	IO

 * Device Descriptor:  /dev/gpioctl
 * Operations:
 *      Read:
 *              Returns "GPIO Port Descriptor" representing current GPIO settings.
 *      Write:
 *              Setup the GPIO ports by using "GPIO Port Descriptor".
 *
 * GPIO Port Descriptor:
 *      The GPIO Port Descriptor contains 12 bytes each for one GPIO port from J0 to J11.
 *      Each byte has following format:
 *              Bit[3:2]        Function        0 = Input,      1 = Output,     2 = Special,    3 = Reserved
 *              Bit[1]          Pullup          0 = Enable,     1 = Disable
 *              Bit[0]          Data            0 = Low,        1 = High

For how to use GPIO, please refer to the sample codes.

Some programers might need the following GPIO mapping corresponding to the CPU if they need access the source codes.

Pin 3 --> GPJ6

Pin 4 --> GPJ0

Pin 5 --> GPJ7

Pin 6 --> GPJ1

Pin 7 --> GPJ8

Pin 8 --> GPJ2

Pin 9 --> GPJ9

Pin 10 --> GPJ3

Pin 11 --> GPJ10

Pin 12 --> GPJ4

Pin 13 --> GPJ11

Pin 14 --> GPJ5

Main Power Connector: CN3

This power interface is an option to the AT/ATX power interface and uses the connector CN3 (4 pins). In this case the SBC requires +5V-only to be supplied to the board. The +3.3V for onboard and external low-power devices is generated on board by a DC/DC converter. However, the +12V that may be required for LCD panel backlight inverter or other external devices, is not generated on board and needs to be additionally supplied.

The following table shows the pin-out of the connector.

CN3: Location on Board, A2

Table 3.27 Main Power Connector

Table 3.27	Power Connector (CN3)
Description	4 pins ATX Mini-Fit Connector, Molex* 39-31-0048 or equivalent
Header	Pin	Signal Name	Function	Type
	1	GND	Ground	P
2	+12V	Power Input	PI
3	+5V	Power Input	PI
4	GND	Ground	PI

Note:

• The +12V is bypass to the pin 1 of CN2.

To protect the external power lines of peripheral devices, make sure that:

1. The wires have the right diameter to withstand the maximum available current.
2. The enclosure of the peripheral device fulfils the fire-protecting requirements of IEC/EN 60950.
3. The current of the pins on this connector is limited to 13A/pin.

Buzzer Connector: CN7

The buzzer on SBC is controlled by PWM. The rated frequency is 2731 + 200Hz.

CN7: Location on Board, A7/B7

JTAG Connector: CN1

JTAG interface commonly used to develop, debug and test microprocessor-based system. APC-7110 series SBC uses a 14-pins connector.

The following table shows the pin outs of the JTAG connector.

CN1: Location on Board, A2

Table 3.28 JTAG Connector

Table 3.28	JTAG Connector (CN1)
Description	HEADER DIP 7*2P 180D MALE 2.54mm
Header	Pin	Signal Name	Function
	1	VCC	Power Supply
2	GND	Ground
3	nTRST	Test Reset
4	GND	Ground
5	TDI	Test Data Input
6	GND	Ground
7	TMS	Test Mode Select
8	GND	Ground
9	TCK	Test Clock
10	GND	Ground
11	TDO	Test Data Output
12	nSYSRST	Target System Reset
13	VCC	Power Supply
12	GND	Ground

Firmware Architecture

The firmware means the software that stores in NAND flash and NOR flash. The firmware in NOR flash is not used during normal operation. It stores some utilities like writing MAC address, checking bad blocks of NAND or updating firmware to NAND. The NAND boot or NOR boot is determined by JP2 jumper setting. The Default setting (JP2 1-2 open) is NAND boot.

Following figure shows the NAND boot or NOR boot.

Figure 4.1 Dual BIOS Architecture

For Linux, the firmware in NAND includes u-boot, sysconfig, kernel zImage and rescue root filesystems (initrd). And for Windows CE, the firmwares in NAND includes u-boot and NK.nb0.

This chapter explains the firmware architecture of NAND flash for both operating systems and how to update them.

Firmware for Linux

Figure 4.2 shows the firmware architecture of Linux in NAND.

Figure 4.2 Firmware Architecture of Linux in NAND Flash

The u-boot starts from the 0th block.(0x0, 1 block = 16K). The Linux kernel zImage starts from the 12th block. (0xc) The sysconfig stores the system configuruation like IP address, default drivers to be load, default services,,,,.etc. and starts from the 128th block. (0x80) The rescue file system is a small file system for rescue purposed and load the minimum set drivers and starts from the 256th block. (0x100) There are about 44MB unsed in NAND for users.

Users need a CF card or hard drive with root file system installed to boot up the complete system. The will be described at Backup and Restore Root File Systems section.

Users can update the firmware under u-boot or Linux root filesystems. The Embedian factory default is fimware pre-installed. Unless necessary, Embedian doesn't recommend you update firmware since the system might not boot anymore if you did wrong operation. (If you develop your own u-boot and kernel, you will need to do that.) There are two ways to update firmware. Following tells howto.

Update firmware under u-boot

You can update firmware under u-boot command prompt using Ethernet tftp download. Please be careful expecially when update u-boot itself or the system might not boot anymore. In case that the u-boot is gone, please go to next chapter and use NOR boot to restore the u-boot.

Before doing that, you need a tftp server program (there are many open source tftp server that you can use.) and install the tftp server under your Windows or Linux host PC. Please put the uboot.bin, zImage.dat, sysconfig.img and nand.img files (they are file name of u-boot, kernel zImage, sysconfig and initrd respectyively.) under tftp root directory.

Then go to u-boot command prompt. To do that, press any key when booting.

We recommend you erase the firmware in NAND first.

# nande 0xc 0x2000000

This will erase the firmware in NAND except u-boot.

If you want to erase all firmwares including of u-boot, you can

# nande 0x0 0x2000000

Now you have erase the u-boot, kernel zImage, sysconfig and initrd.

Next, you need set up the IP address of your tftp server and device first.

# setenv ipaddr xxx.xxx.xxx.xxx

# setenv serverip xxx.xxx.xxx.xxx

# saveenv

For Example:

ipaddr 192.168.1.2

serverip 192.168.1.121

Note:

• Make sure that the ipaddr for device and serverip for Windows (or Linux) PC are in the same network domain.

Next, you can update the uboot.bin, zImage.dat, sysconfig.img and nand.img.

# tftp 30000000 uboot.bin

# nandw 0x0 0x1c000 30000000

# tftp 30000000 zImage.dat

# nandw 0xc 0x190000 30000000

# tftp 30000000 sysconfig.img

# nandw 0x80 0x200000 30000000

# tftp 30000000 nand.img

# nandw 0x100 0x1000000 30000000

Reboot, and now you have your firmware update.

Update firmware under Linux root file systems

You can also use Linux "dd" command at root file system. You need a CF card or hard drive with root file system installed and plug into devices. Copy the u-boot.bin, zImage and initrd.img (They are the file name of u-boot, kernel zImage and initrd.) into / directory. (You can ftp the files to devices.)

[root@apc7110 /]# cd /

[root@apc7110 /]# dd if=/u-boot.bin of=/dev/mtdblock/0

[root@apc7110 /]# dd if=/zImage of=/dev/mtdblock/2

[root@apc7110 /]# dd if=/initrd.img of=/dev/mtdblock/4

Reboot, and you have firmwares update.

Firmware for Windows CE 5.0

Figure 4.3 Firmware Architecture in NAND for Windows CE