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Hardware

MXM-7110 Series Computer on Module (MXM-7110 and MXM-7114)

Contents

image:chapter1.pngIntroduction

This Chapter gives background information on the MXM-7110 series computer on module products from Embedian.

Section include:

  • MXM computer on Module Family
  • Comparison of MXM series Computer on Module Family
  • Block diagram
  • Snapshots


MXM-7110 Series ARM Based Computer on Module

MXM embedded ARM computer on modules are a small size, new concept, reliable, low power and powerful embedded ARM computers. MXM modules are widely used in Notebook graphic card. And Embedian is the world first to leverage this form factor into standard industrial design. Most importantly, all RISC-based modules will be pin-to-pin compatible from Embedian to save customers design efforts and extend their product lifetime.

It is designed to meet the needs for embedded networking and graphical systems, especially for mobile or stationary computer in automatic data collection field such as RFID terminals, batch/ wireless data collection terminals, wireless barcode scanner, POS terminals, thin clients, server PC, biometric access control terminals, transaction terminals, portable test instrument, advanced remote controller, and GPS systems for retail, light industrial and medical/pharmaceutical applications. With all drivers pre-installed for Linux 2.6.18.1 or Windows CE 5.0, people could easily develop their programs and make it time to market in very short time.

Based on Samsung ARM920T SoC plus Silicon Motion SM502 graphic enhanced (MXM-7114), the MXM-7110 series computer on module includes 64MB of NAND Flash, and 64MB of SDRAM. Additional interfaces include three to five RS-232 ports, two USB host ports, a Compact Flash controller that supports true IDE modes, 12 GPIOs, a real-time clock, an LCD controller supporting up to 1280 x 1024 displays and an audio codec.

A 242-pin golden finger connector enables the MXM -7110 series computer on module to interface with the OEM's custom circuitry, and with an evaluation carrier board that is supplied with Embedian's evaluation kit. The evaluation carrier board includes a LCD panel, headers and connectors for all interfaces.

MXM-7110 series computer on includes MXM-7110 and MXM-7114.



Comparison of MXM-7110 Series Computer on Module

MXM series computer on module families host a Samsung S3C2440A SOC (ARM920T core) clocking at 400Mhz with MMU and AMBA BUS.

There are two products (MXM-7110 and MXM-7114) so far in this product category. The differences between each model are listed in the following table 1.1. Users could decide the best features and choose the right model number.


Table 1.1

MXM-7110 MXM-7114(*)
Processor S3C2440A S3C2440A
Clocking Rate 400Mhz 400Mhz
NAND Flash 64MB 64MB
SDRAM(**) 64MB 64MB
RS232 3 (from CPU) 5 (three from CPU and two from SM502)
USB Host 1.1 2 2
Connector 242-pin MXM golden finger 242-pin MXM golden finger + 60-pin 0.5mm pitch SMT board-to-board connector (***)
CompactFlash 1 1
10/100 Mbps Ethernet 1 x DM9000B 1 x DM9000B
LCD from CPU (up to 640x480) from CPU and SM 502 (up to 1280x1024)
Touch Panel 4-Wire ADC 4-Wire ADC
GPIO 12 12
PWM 4 4
RTC Y Y
WatchDog Timer Y Y
IIC Y Y
AC97 Y Y
IDE Y Y
System Bus 8/16-bit 8/16-bit
JTAG Y Y


Note

  1. (*) MXM-7114 = MXM-7110 + SM502 related functionality.
  2. (**)128MB SDRAM is available by project based.
  3. (***) The 60-pin 0.5mm pitch SMT board-to-board connector is all SM502 related signal. For MXM-7110, user doesn't need this connector. And for other manufacturers that would like to adopt this form factor, add this type of connector if you have companion chip other than CPUs.


The MXM-7110 series computer on module is designed in a 66mm x 50mm factor.


MXM-7110 Series Block Diagram

The following diagram illustrates the system organization of the MXM-7110 and MXM-7114. Arrows indicate direction of control and not necessarily signal flow.


Figure 1.1 MXM-7110 series SBC Block Diagram

MXM-7110

image: mxm7110_block_diagram.png

MXM-7114

image: MXM_7114_block_diagram.png

Snapshots

Figure 1.2 Snapshot of MXM-7110 Series Computer on Module

image: mxm7110_pic1.jpg


Details for this diagram will be explained in the following chapters.

image:chapter2.pngSpecifications

This Chapter contains specifications of MXM-7110 series computer on module.

Section include:

  • Functional specifications
  • Mechanical specifications
  • Electrical specifications
  • Environmental specifications
  • MTBF
  • EMI/RFI and ESD protection


Functional Specification

Processor

  • Samsung S3C2440A
  • 32-bit ARM920T Core
  • Clock Rates up to 400Mhz
  • 133Mhz System BUS
  • Voltage and Frequency Scaling
  • Booting from NAND Flash

Power Supply

  • Single input +5V DC power from 242-pin interface
  • Real-time clock battery powered

Memory

  • Onboard 64MB NAND Flash
  • Onboard 64MB SDRAM (32-bit), 128MB SDRAM available on project based
  • CompactFlash(CF), Type I and Type II, 3.3V, True IDE Mode

Universal Serial Bus (USB)

  • Chipset: CPU internal
  • Two USB 1.1 host ports (12Mbit/s speed)
  • OHCI Rev. 1.0 Compliance
  • USB Hub as model option
  • USB legacy keyboard, mouse and hard disk support

COM Port

  • Chipset: CPU internal and SM502
  • Five RS232 ports, (three from CPU and two from SM502)
  • Four with TX, RX, CTS and RTS. One with TX, RX only.

Ethernet

  • Chipset:Davicom DM9000B
  • One 10/100Mbps Ethernet (MAC integrated), RJ-45 connector onboard
  • Compliance with IEEE 802.3u 100Base-TX and 802.3 10Base –T
  • Compliance with IEEE 802.3u auto-negotiation protocol for automatic link-type selection
  • Full-duplex/half -duplex capability
  • Supports IEEE 802.3x full duplex flow control
  • Support Auto-MDIX

CompactFlash(CF) Interface

  • Chipset: CPU Memory Bus
  • Type I and Type II, 3.3V
  • True IDE mode

AC97 Audio-Codec Interface

  • Chipset: CPU AC-link interface
  • Support 16-bit Sample
  • AC97 version 2.3 compliance interface
  • 1-ch stereo PCM inputs/ 1-ch stereo PCM outputs1-ch MIC input
  • Advanced Linux Sound Architecture (ALSA) API support

Discrete I/O

  • 12 general-purpose digital I/Os
  • 8 External interrupt to eliminate performance hogging polling

IIC Interface

  • Chipset: CPU internal
  • 1-ch Multi-Master IIC-Bus
  • Serial, 8-bit oriented and bi-directional data transfers can be made at up to 100 Kbit/s in Standard mode or up to 400 Kbit/s in Fast mode.

SPI Interface

  • Chipset: CPU internal
  • Compatible with 2-ch Serial Peripheral Interface Protocol version 2.11
  • 2x8 bits Shift register for Tx/Rx
  • DMA-based or interrupt-based operation

Watchdog Timer (WDT)

  • Chipset:CPU internal
  • 16-bit Watchdog Timer
  • Interrupt Request or System Reset at Timeout

CPU Video Graphic Array (VGA)

  • Chipset:CPU internal
  • TFT Panel Support
  • 640 x 480 resolution for best performance
  • 65,000 color support
  • TTL and 18-bit interface

Pulse Width Modulation (PWM)

  • Chipset:CPU Internal
  • 4-ch 16-bit Timer with PWM / 1-ch 16-bit internal timer with DMA-based or interrupt-based operation
  • Programmable duty cycle, frequency, and polarity

SM502 Video Graphic Array (VGA)

  • Chipset:Silicon Motion SM502
  • Single channel LVDS Panel Support
  • 1280 x 1024 resolution
  • 260,000 color support
  • External 8MB SDRAM onboard
  • 24-bit LVDS and CRT interface (18-bit available)

Touch Panel Interface

  • Chipset:CPU Internal
  • 10-bit CMOS ADC
  • 4-wire SDC interface

CPU System Bus (ISA-like Interface)

  • Chipset:CPU internal
  • For add-on companion chip
  • 16-bit only

Real Time Clock (RTC)

  • RTC power interface

JTAG

  • Male 2.54 mm 2x7 header

BIOS

  • Universal Bootloader (u-boot)
  • Serial or Ethernet TFTP download
  • Booting from NAND Flash Technology

Operating System

  • Linux 2.6.18.1 (Debian ARM Linux)
  • Windows CE 5.0



Mechanical Specification

The MXM-7110 series embedded ARM computer boards is very tiny (66mm x 50mm) in form factor. This section describes the component dimensions and mounting of the board. Detailed drawings are available from Embedian for production customers.

Dimensions

Length x Width: 66mm x 50mm (2.60" x 1.97")

Mechanical Drawing

The following mechanical drawing specifies the dimension of MXM-7110 seriers computer on module, as well as key components on the board. All dimensions are in mini-meters.


Top View

image: MXM_7114_mechanical_top.png


Bottom View

image: MXM_7114_mechanical_bottom.png


Mounting Holes

Two mounting holes are provided for mounting. The diameter of the holes is 4.0 mm. (The diameter of the ring is 5.5mm.) Mounting holes are plated through and connected to the module ground plane.

For reliable ground connections, use locking washers (star or split) when securing an MXM-7110 series computer on module in a carrier board. Make sure that the washers do not extend beyond the limits of the pads provided (5.5mm). A M3, F head, 4mm long, 5mm in diameter, and 1mm head thick screw is recommended.

Clearances

The MXM-7110 series computer on module has a low profile. Key clearances are as follows:

Height on Top

Max 2.8 mm (110.24 mil)

Height on Bottom

Maximum 2.4 mm (94.49 mil)

Board Thickness

1.2 mm

Clearance over Top and Bottom

6.4 mm

Weight

About 20g


Electrical Specification

Supply Voltages

+5V DC power (+/- 5%)

MXM-7110 series computer on module require a +5V power supply from custom carrier board.

Supply Voltage Ripple

100mV peak to peak 0 - 20MHz

Supply Current (Typical)

MXM-7110 series computer on module is a low power consumption computer on module. The power-consumption tests were executed to give an overview of the electrical conditions for several operational states.

Following table lists the typical power consumption of each MXM-7110 series computer on module. All I/Os are up under the testing environment.

Table 2.1 Power Consumption of MXM-7110 series Computer on Module

MXM-7110 MXM-7114
Power Consumption 250mA/5V 300mA/5V

Note:

  1. The above data is module only and the tested LCD is 640x480 TFT panel.

Real-Time Clock (RTC) Battery

  • Voltage range: 1.8V – 3.6V (Typical@3.0V)
  • Quiescent current: max. 3uA@3.0 V

CF

  • 3.3V only

LCD

The LCD signal control voltage specification is as follows.

  • +3.3/5V for TTL level LCD Panel

Environmental Specification

Temperature

  • Operating: -5oC to +75oC(*) (with appropriate airflow)
  • Non-operating: -10oC to +85oC (non-condensing)

Note:

  • (*) The maximum operating temperature is the maximum measurable temperature on any spot on the module's surface. You must maintain the temperature according to the above specification.

Humidity

  • Operating: 0 to 95% (non-condensing)
  • Non-operating: 0 to 95% (non-condensing)

MTBF

  • System MTBF (hours) : >100,000 hours

The above MTBF (Mean Time Between Failure) values were calculated using a combination of manufacturer's test data, if the data was available, and a Bellcore calculation for the remaining parts. The Bellcore calculation used is "Method 1 Case 1". In that particular method the components are assumed to be operating at a 50 % stress level in a 40o C ambient environment and the system is assumed to have not been burned in. Manufacturer's data has been used wherever possible. The manufacturer's data, when used, is specified at 50oC, so in that sense the following results are slightly conservative. The MTBF values shown below are for a 40oC in an office or telecommunications environment. Higher temperatures and other environmental stresses (extreme altitude, vibration, salt water exposure, etc.) lower MTBF values.

EMI/RFI and ESD Protection

The MXM-7110 series computer on module incorporates a number of standard features that protect it from electrostatic discharge (ESD) and suppress electromagnetic and radio-frequency interference (EMI/RFI). Transient voltage suppressors, EMI fences, filters on I/O lines and termination of high-frequency signals are included standard on all systems.

The module provides surge protection on the input power lines of itself. This is especially important if the power supply wires will be subject to EMI/RFI or ESD. If the system incorporates other external boards, it is the responsibility of the designer or integrator to provide surge protection on the system input power lines.



image:chapter3.png Hardware Reference

This section gives details of the hardware pin out assignment of the MXM-7110 series computer on module.

Connector Type

The MXM-7110 series computer on module uses MXM 242-pin golden finder as interface. The connector on module is called header and the connector on custom board is called socket.

Figure 3.1 CN2 Socket connector Type (Mating Connector: B33P102-0013 (Speed Tech), AS0B326-S78N-7F (Foxconn) or compatible)

image: mxm-connector.png


Figure 3.2 CN3 Header Type (On module, Connector : DF12(3.0)-60DP-0.5V (**) (Hirose) or compatible)

image: CN3_header.png


Figure 3.3 CN3 Socket Type (On carrier board, Mating Connector : DF12-S27A-060 or compatible(Please contact Embedian for this part.))

image: CN3_socket.png

Connector Mechanical Drawing

The detail connector mechanical drawing is as follows.


Figure 3.4 CN2 Socket Connector Mechanical Drawing

image: CN2_socket_machanical.png


Figure 3.5 CN3 Header Connector Mechanical Drawing

image: CN3_header_mechanical.png


Figure 3.6 CN3 Socket Connector Mechanical Drawing

image: CN3_socket_mechanical.png

Connector Location

MXM series computer on module use 242-pin MXM form factor golden finger connectors CN2 and a 60-pin DF12(3.0)-60DP-0.5V (**) (Hirose) or compatible connector CN3 (MXM-7114 only) as an interface to connect with carrier board. The CN3 is mainly for SM502 related. For other manufactures that are intend to use the MXM form factor, please add your companion chip pin out to CN3 as well.

Figure 3.7 Connector Location I

image: MXM-7114-connector-location.png


Figure 3.8 Connector Location II

image: MXM-7114-connector-location-ii.png


Connector Pin Assignments

The following tables describe the electrical signals available on the connectors of the MXM-7110 series computer on module. Each section provides relevant details about the connector including part numbers, mating connectors, signal descriptions and references to related chapters. For precision measurements of the location of the connectors on the module, refer to section 2.2.2. for mechanical drawing.


Legend:

N.C. Not Connected
RSVD Reserved for future platform, suggest open at current design
GND Module Ground Plane



Signal Types:

I signal is an input to the system
O signal is an output to the system
IO signal may be input or output
P power and ground
A analog signal
AI analog input
AO analog output
ST schmitt-trigger


CN2 Connector (Golden Finger)

Address bus, data bus, CompactFlash, IDE, JTAG, Ethernet, chip select signal, external interrupt signals and all other CPU related are from CN2.

The following table shows the pin outs of CN2 connector.

Table 3.1 CN2 Connector (Bottom Side)


Table 3.1 CN2 Connector (Bottom Side)
Description Mating Connector : B33P102-0013 (Speed Tech), AS0B326-S78N-7F (Foxconn) or compatible
Header Pin Signal Name Function Type
image: connector-pin.png 4-wire touch screen
1 XP Plus X-axis on-off control signal AI
3 XM Minus X-axis on-off control signal AI
5 YP Plus Y-axis on-off control signal AI
7 YM Minus Y-axis on-off control signal AI
ADC Input
9 AIN3 ADC Input AI
11 AIN2 ADC Input AI
13 AIN1 ADC Input AI
15 AIN0 ADC Input AI
Reserved Pin
17 RSVD Reserved NC
19 RSVD Reserved NC
21 RSVD Reserved NC
23 RSVD Reserved NC
Key
Key
Key
Key
Key
Key
37 RSVD Reserved NC
39 RSVD Reserved NC
DMA
41 DMAACK0 External DMA acknowledge O
43 DMADREQ0 External DMA request I
Address Bus
45 ADDR0 Address Bus O
47 ADDR1 O
49 ADDR2 O
51 ADDR3 O
53 ADDR4 O
55 ADDR5 O
57 ADDR6 O
59 ADDR7 O
61 ADDR8 O
63 ADDR9 O
65 ADDR10 O
67 ADDR11 O
69 ADDR12 O
71 ADDR13 O
73 ADDR14 O
75 ADDR15 O
77 GND Ground Power P
Address Bus
79 ADDR16 Address Bus O
81 ADDR17 O
83 ADDR18 O
85 ADDR19 O
87 ADDR20 O
89 ADDR21 O
91 ADDR22 O
93 ADDR23 O
95 ADDR24 O
97 ADDR25 O
99 ADDR26 O
Reserved Pin
101 RSVD Reserved NC
103 RSVD Reserved NC
105 RSVD Reserved NC
107 RSVD Reserved NC
109 RSVD Reserved NC
111 RSVD Reserved NC
113 RSVD Reserved NC
115 GND Ground P
Chip Select
117 nGCS0 Chip Select O
119 nGCS1 O
121 nGCS2 O
123 nGCS3 O
125 nGCS4 O
127 nGCS5 O
129 nWBE0 Write byte enable O
131 nWBE1 O
133 nOE Output Enable O
135 nWE Write Enable O
Data Bus
137 DATA0 DATA[15:0]

INPUT DATA DURING MEMORY READ AND OUTPUT DATA DURING MEMORY WRITE. BUS WIDTH OF 8/16 BIT IS PROGRAMMABLE

I/O
139 DATA1 I/O
141 DATA2 I/O
143 DATA3 I/O
145 DATA4 I/O
147 DATA5 I/O
149 DATA6 I/O
151 DATA7 I/O
153 DATA8 I/O
155 DATA9 I/O
157 DATA10 I/O
159 DATA11 I/O
161 DATA12 I/O
163 DATA13 I/O
165 DATA14 I/O
167 DATA15 I/O
169 nWAIT nWAIT requests I
171 CLKOUT Clock Output O
173 WAKEUP Wakeup requests I
175 nRESET_IN Reset S3C2440A ST
177 nRESET_OUT Reset External Device O
179 OM0 BootRom Select I
Reserved Pin
181 RSVD Reserved NC
183 RSVD NC
USB Host 1
185 USBH- USB Host Data - I/O
187 USBH+ USB Host Data + I/O
Reserved Pin
189 RSVD Reserved NC
191 RSVD NC
USB Host 2
193 USBH- USB Host Data - I/O
195 USBH+ USB Host Data + I/O
197 GND Ground Power P
Reserved Pin
199 RSVD Reserved NC
201 RSVD NC
203 RSVD NC
205 RSVD NC
207 RSVD NC
209 RSVD NC
211 RSVD NC
213 RSVD NC
215 RSVD NC
217 RSVD NC
219 RSVD NC
221 RSVD NC
223 RSVD NC
225 RSVD NC
227 RSVD NC
229 RSVD NC
231 RSVD NC
233 RSVD NC
235 RSVD NC
237 RSVD NC
239 RSVD NC
241 RSVD NC





Table 3.2 CN2 Connector (Top Side)


Table 3.2 CN2 Connector (Top Side)
Description Mating Connector : B33P102-0013 (Speed Tech), AS0B326-S78N-7F (Foxconn) or compatible
Header Pin Signal Name Function Type
image: connector-pin-ii.png Reserved Pin
2 RSVD Reserved NC
4 RSVD NC
JTAG
6 TMS TAP Controller Mode Select I
8 TDO TAP Controller Data Output O
10 TDI TAP Controller Data Input I
12 TCK TAP Controller Clock I
14 nTRST TAP Controller Reset I
AC97
16 AC_SYNC 48kHz fixed rate sample sync O
18 AC_BIT_CLK 12.288MHz serial data clock IO
20 AC_nRESET AC’97 Master H/W Reset O
22 AC_SDATA_IN AC'97 input stream I
24 AC_SDATA_OUT AC'97 output stream O
Key
Key
Key
Key
Key
Key
Power Input
38 EXT5V DC in 5V P
40 EXT5V DC in 5V P
42 EXT5V DC in 5V P
44 EXT5V DC in 5V P
Reserved
46 RSVD Reserved NC
CPU LCD
48 VD19 LCD data bus RED0 (LSB) O
50 VD20 LCD data bus RED1 O
52 VD21 LCD data bus RED2 O
54 VD22 LCD data bus RED3 O
56 VD23 LCD data bus RED4 (MSB) O
58 VD10 LCD data bus GREEN0 (LSB) O
60 VD11 LCD data bus GREEN1 O
62 VD12 LCD data bus GREEN2 O
64 VD13 LCD data bus GREEN3 O
66 VD14 LCD data bus GREEN4 O
68 VD15 LCD data bus GREEN5 (MSB) O
Reserved Pin
70 RSVD Reserved O
72 VD3 LCD data bus BLUE0 (LSB) O
74 VD4 LCD data bus BLUE1 O
76 VD5 LCD data bus BLUE2 O
78 VD6 LCD data bus BLUE3 O
80 VD7 LCD data bus BLUE4 (MSB) O
82 VCLK LCD clock signal O
84 HSYNC Horizontal synchronous signal O
86 VSYNC Vertical synchronous signal O
88 VDEN Data enable signal O
90 GND Grpund Power P
PWM
92 PWM0 Pulse Width Modulation Output O
94 PWM1 O
96 PWM2 O
98 PWM3 O
IIC
100 IICSCL IIC-bus clock IO
102 IICSDA IIC-bus data IO
SPI
104 SPIMISO0 Master mode: data input;
Slave mode: data output
IO
106 SPIMOSI0 Master mode: data output;
Slave mode: data input
IO
108 SPICLK0 SPI Clock IO
110 nSS0 SPI Chip Select I
112 SPIMISO1 Master mode: data input;
Slave mode: data output
IO
114 SPIMOSI1 Master mode: data output;
Slave mode: data input
IO
116 SPICLK1 SPI Clock IO
118 nSS1 SPI Chip Select I
Interrupt
120 EXT_INT1 External interrupt request I
122 EXT_INT2 I
124 EXT_INT3 I
126 EXT_INT4 I
128 EXT_INT5 I
130 EXT_INT6 I
132 EXT_INT7 I
134 EXT_INT8 I
136 GND Ground Power I
GPIOs
138 GPIO1 General input/output ports IO
140 GPIO2 IO
142 GPIO3 IO
144 GPIO4 IO
146 GPIO5 IO
148 GPIO6 IO
150 GPIO7 IO
152 GPIO8 IO
154 GPIO9 IO
156 GPIO10 IO
158 GPIO11 IO
160 GPIO12 IO
162 VCCIO_PWREN External Device Power Control O
164 VCCLCD_PWREN Panel Power Control O
166 BACKLIGHT_EN Panel Backlight Control O
168 LCD_PWREN Panel Signal Control O
170 BBAT RTC Battery Power(DC 3V) P
SD Card(*)
172 SD_nCD SD Insert Detect I
174 SD_WP SD Write Protect I
176 SDCLK SD Clock O
178 SDCMD SD receive response/ transmit command O
180 SDDAT0 SD receive/transmit data IO
182 SDDAT1 SD receive/transmit data IO
184 SDDAT2 SD receive/transmit data IO
186 SDDAT3 SD receive/transmit data IO
188 GND Ground Power P
Reserved Pin
190 RSVD Reserved NC
192 RSVD NC
194 RSVD NC
196 RSVD NC
198 RSVD NC
200 RSVD NC
202 RSVD NC
204 RSVD NC
UART
206 RXD2 UART receives data input I
208 TXD2 UART transmits data output O
210 nCTS1 UART clear to send input signal I
212 nRTS1 UART request to send output signal O
214 RXD1 UART receives data input I
216 TXD1 UART transmits data output O
218 nCTS0 UART clear to send input signal I
220 nRTS0 UART request to send output signal O
222 RXD0 UART receives data input I
224 TXD0 UART transmits data output O
Ethernet
226 LANLED1 Ethernet Speed LED O
228 LANLED2 Ethernet Link LED O
230 AVDD18 1.8V For Transformer P
232 TX- Ethernet Transmits data- O
234 TX+ Ethernet Transmits data+ O
236 AGND Ethernet Ground P
238 RX- Ethernet Receives data- I
240 RX+ Ethernet Receives data+ I
242 AVDD18 1.8V For Transformer P


(*)As of now, Linux driver is not supported.

CN3 Connector (MXM-7114 Only)

All SM502 related interface is from CN3.

The following table shows the pin outs of CN3 connector.


Table 3.3 CN3 Connector


Table 3.3 CN3 Connector
Description Connector: DF12(3.0)-60DP-0.5V (**) (Hirose) or compatible
Mating Connector : DF12-S27A-060. Please Contact Embedian for this Part.
Header Pin Signal Name Function Type
image: CN3.png 2 SM502_VCLK LCD clock signal O
4 SM502_HSYNC Horizontal synchronous signal O
6 SM502_VSYNC Vertical synchronous signal O
8 SM502_VDEN Data enable signal O
10 SM502_LCDPWREN Panel Signal Control O
12 GND Ground Power P
14 SM502_VGA_B VGA Blue output AO
16 SM502_VGA_G VGA Green output AO
18 SM502_VGA_R VGA Red output AO
20 SM502_VGA_HSYNC VGA Horizontal synchronous signal O
22 SM502_VGA_VSYNC VGA Vertical synchronous signal O
24 GND Ground Power P
26 GND Ground Power P
ZV Port(**)
28 VP_VSYNC Video Port Vertical synchronous signal I
30 VP_HREF Video Port Horizontal synchronous signal I
32 VP_CLK Video Port clock signal I
34 ZV0 Video Data Input I
36 ZV1 I
38 ZV2 I
40 ZV3 I
42 ZV4 I
44 ZV5 I
46 ZV6 I
48 ZV7 I
50 RSVD Reserved NC
SM502 UART0
52 SM502_TXD0 UART transmits data output O
54 SM502_RXD0 UART receives data input I
56 SM502_nCTS0 UART clear to send input signal I
58 SM502_nRTS0 UART request to send output signal O
Power Input
60 EXT5V DC5V Input P
SM502 LCD Data Bus
1 SM502_LCDDATA0 LCD data bus BLUE0 (LSB) O
3 SM502_LCDDATA1 LCD data bus BLUE1 O
5 SM502_LCDDATA2 LCD data bus BLUE2 O
7 SM502_LCDDATA3 LCD data bus BLUE3 O
9 SM502_LCDDATA4 LCD data bus BLUE4 O
11 SM502_LCDDATA5 LCD data bus BLUE5 O
13 SM502_LCDDATA6 LCD data bus BLUE6 O
15 SM502_LCDDATA7 LCD data bus BLUE7 (MSB) O
17 SM502_LCDDATA8 LCD data bus GREEN0 (LSB) O
19 SM502_LCDDATA9 LCD data bus GREEN1 O
21 SM502_LCDDATA10 LCD data bus GREEN2 O
23 SM502_LCDDATA11 LCD data bus GREEN3 O
25 SM502_LCDDATA12 LCD data bus GREEN4 O
27 SM502_LCDDATA13 LCD data bus GREEN5 O
29 SM502_LCDDATA14 LCD data bus GREEN6 O
31 SM502_LCDDATA15 LCD data bus GREEN7(MSB) O
33 SM502_LCDDATA16 LCD data bus RED0 (LSB) O
35 SM502_LCDDATA17 LCD data bus RED1 O
37 SM502_LCDDATA18 LCD data bus RED2 O
39 SM502_LCDDATA19 LCD data bus RED3 O
41 SM502_LCDDATA20 LCD data bus RED4 O
43 SM502_LCDDATA21 LCD data bus RED5 O
45 SM502_LCDDATA22 LCD data bus RED6 O
47 SM502_LCDDATA23 LCD data bus RED7 (MSB) O
49 RSVD Reserved NC
SM502 UART1
51 SM502_TXD1 UART transmits data output O
53 SM502_RXD1 UART receives data input I
55 SM502_nCTS1 UART clear to send input signal I
57 SM502_nRTS1 UART request to send output signal O
Power Input
59 EXT5V DC5V Input P


(**)As of now, no driver support yet.

image:chapter4.pngFirmware Architecture

The firmware means the software that stores in NAND flash. MXM-7110 series computer on module support boot from NAND flash directly. However, the evaluation kit has a NOR flash to help user restore the firmware in NAND flash. People can refer to Dual BIOS Design section for more details.

For Linux, the firmware in NAND includes u-boot, sysconfig, kernel zImage and rescue root filesystems (initrd). And for Windows CE, the firmwares in NAND includes u-boot and NK.nb0.

This chapter explains the firmware architecture of NAND flash for both opearting sytem and how to update them.



Firmware for Linux

Figure 4.1 shows the firmware architecture of Linux in NAND.

Figure 4.1 Firmware Architecture of Linux in NAND Flash

image: firmware_architecture_linux.png

The u-boot starts from the 0th block.(0x0, 1 block = 16K). The Linux kernel zImage starts from the 12th block. (0xc) The sysconfig stores the system configuruation like IP address, default drivers to be load, default services,,,,.etc. and starts from the 128th block. (0x80) The rescue file system is a small file system for rescue purposed and load the minimum set drivers and starts from the 256th block. (0x100) There are about 44MB unsed in NAND for users.

Users need a CF card or hard drive with root file system installed to boot up the complete system. (Users can also build his own smaller root filesystems.) The will be described at Backup and Restore Root File Systems section.

Users can update the firmware under u-boot or Linux root filesystems. The Embedian factory default is fimware pre-installed. Unless necessary, Embedian doesn't recommend you update firmware since the system might not boot anymore if you did wrong operation. (If you develop your own u-boot and kernel, you will need to do that.) There are two ways to update firmware. Following tells howto.



Update firmware under u-boot

You can update firmware under u-boot command prompt using Ethernet tftp download. Please be careful expecially when update u-boot itself or the system might not boot anymore. In case that the u-boot is gone, please go to next chapter and use NOR boot to restore the u-boot.

Before doing that, you need a tftp server program (there are many open source tftp server that you can use.) and install the tftp server under your Windows or Linux host PC. Please put the uboot.bin, zImage.dat, sysconfig.img and nand.img files (they are file name of u-boot, kernel zImage, sysconfig and initrd respectyively.) under tftp root directory.

Then go to u-boot command prompt. To do that, press any key when booting.

We recommend you erase the firmware in NAND first.

# nande 0xc 0x2000000

This will erase the firmware in NAND except u-boot.

If you want to erase all firmwares including of u-boot, you can

# nande 0x0 0x2000000

Now you have erase the u-boot, kernel zImage, sysconfig and initrd.


Next, ou need set up the IP address of your tftp server and device first.

# setenv ipaddr xxx.xxx.xxx.xxx

# setenv serverip xxx.xxx.xxx.xxx

# saveenv

For Example:

ipaddr 192.168.1.2

serverip 192.168.1.121

Note:

  • Make sure that the ipaddr for device and serverip for Windows (or Linux) PC are in the same network domain.



Next, you can update the uboot.bin, zImage.dat, sysconfig.img and nand.img.

# tftp 30000000 uboot.bin
# nandw 0x0 0x1c000 30000000


# tftp 30000000 zImage.dat
# nandw 0xc 0x190000 30000000


# tftp 30000000 sysconfig.img
# nandw 0x80 0x200000 30000000


# tftp 30000000 nand.img
# nandw 0x100 0x1000000 30000000

Reboot, and now you have your firmware update.



Update firmware under Linux root file systems

You can also use Linux "dd" command at root file system. You need a CF card or hard drive with root file system installed and plug into devices. Copy the u-boot.bin, zImage and initrd.img (They are the file name of u-boot, kernel zImage and initrd.) into / directory. (You can ftp the files to devices.)

[root@apc7110 /]# cd /
[root@apc7110 /]# dd if=/u-boot.bin of=/dev/mtdblock/0
[root@apc7110 /]# dd if=/zImage of=/dev/mtdblock/2
[root@apc7110 /]# dd if=/initrd.img of=/dev/mtdblock/4

Reboot, and you have firmwares update.



Firmware for Windows CE 5.0

Figure 4.2 Firmware Architecture in NAND for Windows CE

image: firmware_architecture_wince.png

Most Windows CE device using eboot as bootloader. Embedian uses u-boot still since u-boot is moch more powerful than eboot.

There are only two files (u-boot and Nk.nb0) in NAND flash. The u-boot starts from the 0th block.(0x0, 1 block = 16K). The NK.nb0 starts from the 12th block. (0xc) There are about 32MB unsed in NAND for users.

Users can update the firmware under u-boot. The Embedian factory default is fimware pre-installed. Unless necessary, Embedian doesn't recommend you update firmware since the system might not boot anymore if you did wrong operation. (If you develop your own u-boot and Nk.nb0, you will need to do that.) Following tells you how to update firmware under Windows CE system.

Update firmware under u-boot

You can update firmware under u-boot command prompt using Ethernet tftp download. Please be careful expecially when update u-boot itself or the system might not boot anymore. In case that the u-boot is gone, please go to next chapter and use NOR boot to restore the u-boot.

Before doing that, you need a tftp server program (there are many open source tftp server that you can use.) and install the tftp server under your Windows or Linux host PC. Please put the uboot.bin, zImage.dat, sysconfig.img and nand.img files (they are file name of u-boot, kernel zImage, sysconfig and initrd respectyively.) under tftp root directory.

Then go to u-boot command prompt. To do that, press any key when booting.

We recommend you erase the firmware in NAND first.

# nande 0xc 0x2000000

This will erase the firmware in NAND except u-boot.

If you want to erase all firmwares including of u-boot, you can

# nande 0x0 0x2000000

Now you have erase the u-boot, kernel zImage, sysconfig and initrd.

Next, ou need set up the IP address of your tftp server and device first.

# setenv ipaddr xxx.xxx.xxx.xxx

# setenv serverip xxx.xxx.xxx.xxx

# saveenv

For Example:

ipaddr 192.168.1.2

serverip 192.168.1.121

Note:

  • Make sure that the ipaddr for device and serverip for Windows (or Linux) PC are in the same network domain.


Next, you can update the uboot.bin, Nk.nb0.

# tftp 30000000 uboot.bin
# nandw 0x0 0x1c000 30000000


# tftp 30000000 Nk.nb0
# nandw 0xc 0x2000000 30000000

Reboot, and you have your firmware update.

image:chapter5.pngGeneral PCB Design Recommendations

This section gives general description of the design recommendation of the Printed Circuit Board (PCB) for MXM-7110 series computer on module carrier boards. From a cost- effectiveness point of view, a four-layer board is the target platform for the carrier board design. For better quality, a six-layer or eight-layer board is preferred.


Nominal Board Stack Ups

The trace impedance typically noted (55 Ω ± 10%) is the "nominal" trace impedance for a 5-mil wide external trace and a 4-mil wide internal trace. However, some stackups may lead to narrower or wider traces on internal or external layers in order to meet the 55-Ω impedance target, that is, the impedance of the trace when not subjected to the fields created by changing current in neighboring traces. Note the trace impedance target assumes that the trace is not subjected to the EMI fields created by changing current in neighboring traces.

It is important to consider the minimum and maximum impedance of a trace based on the switching of neighboring traces when calculating flight times. Using wider spaces between the traces can minimize this trace-to-trace coupling. In addition, these wider spaces reduce settling time. Coupling between two traces is a function of the coupled length, the distance separating the traces, the signal edge rate, and the degree of mutual capacitance and inductance. In order to minimize the effects of trace-to-trace coupling, the routing guidelines documented in this Section should be followed. Also, all high speed, impedance controlled signals should have continuous GND referenced planes and cannot be routed over or under power/GND plane splits.


Four Layer Board Stackup

Figure 5-1 illustrates an example of a four-layer stack-up with 2 signal layers and 2 power planes. The two power planes are the power layer and the ground layer. The layer sequence of component-ground-power-solder is the most common stack-up arrangement from top to bottom.


Figure 5.1 Four-Layer Stack-Up

image: four-layer_stack-up.png



Table 5.1 Recommended Four-Layer Stack-Up Dimensions

Table 5.1 Recommended Four-Layer Stack-Up Dimensions
Dielectric Thickness(mil) Layer Layer Signal-End Signals Differential Signals USB Differential Signals
No Type Width (mil) Impedance (ohm) Width (mil) Impedance (ohm) Width (mil) Impedance (ohm)
0.7 L1 Signals 6/6 55 +/- 10% 6/7/6 100 +/- 10% 6/5/6 90 +/- 10%
5 Prepreg
1.4 L2 Ground
47 Core
1.4 L3 Power
5 Prepreg
0.7 L4 Signals 6/6 55 +/- 10% 6/7/6 100 +/- 10% 6/5/6 90 +/- 10%


Note:

Target PCB Thickness totals 62mil+/-10%



Six Layer Board Stack Up

Figure 5-2 illustrates an example of a six-layer stack-up with 4 signal layers and 2 power planes.

The two power planes are the power layer and the ground layer. The layer sequence of component-ground-IN1-IN2-power-solder is the most common stack-up arrangement from top to bottom.


Figure 5.2 Six-Layer Stack-Up

image: six-layer_stack-up.png



Table 5.2 Recommended Six-Layer Stack-Up Dimensions

Table 5.2 Recommended Six-Layer Stack-Up Dimensions
Dielectric Thickness(mil) Layer Layer Signal-End Signals Differential Signals USB Differential Signals
No Type Width (mil) Impedance (ohm) Width (mil) Impedance (ohm) Width (mil) Impedance (ohm)
1.7 L1 Signals 5/5 55 +/- 10% 5/6/5 100 +/- 10% 5/4/5 90 +/- 10%
4 Prepreg
1.4 L2 Ground
5 Core
1.4 L3 IN1 5/5 55 +/- 10% 4/8/4 100 +/- 10% 4/5/4 90 +/- 10%
35 Prepreg
1.4 L4 IN2
5 Core 5/5 55 +/- 10% 4/8/4 100 +/- 10% 4/5/4 90 +/- 10%
4 Prepreg
1.7 L6 Signals 5/5 55 +/- 10% 5/6/5 100 +/- 10% 5/4/5 90 +/- 10%


Note:

Target PCB Thickness totals 62mil+/-10%




Differential Impedance Targets for Microstrip Routing

Table 5.3 shows the target impedance of the differential signals. The carrier board should follow the required impedance in this table.


Table 5.3 Differential Signals Impedance Requirement



Table 5.3 Differential Signals Impedance Requirement
Signal Type Impendance
USB 90ohm +/- 10%
LAN 100ohm +/- 10%



Alternative Stack Ups

When customers choose to use different stack-ups (number of layers, thickness, trace width, etc.), the following key elements should be observed:

  1. Final post lamination, post etching, and post plating dimensions should be used for electrical model extractions.
  2. All high-speed signals should reference solid ground planes through the length of their routing and should not cross plane splits. To guarantee this, both planes surrounding strip-lines should be GND.
  3. Recommend that high-speed signal routing be done on internal, strip-line layers. High-speed routing on external layers should be minimized in order to avoid EMI. Routing on external layers also introduces different delays compared to internal layers. This makes it extremely difficult to do length matching if routing is done on both internal and external layers.



image:chapter6.pngCarrier Board Design Guidelines

This section gives detail description of the design recommendation of the MXM-7110 series computer on module carrier boards. It points out the rules that need to be carefully followed in circuit design and layout.


General Circuit Design Guide

This section states the circuit design guide. Please follow carefully or the system might not able to boot.


System-Wise

Please contact Embedian for this part.



Universal Serial BUS (USB)

MXM-7110 series computer modules provide two USB 1.1 ports.



Universal Serial Bus (USB)

The Universal Serial Bus (USB) provides a bi-directional, isochronous, hot-attachable Plug and Play serial interface for adding external peripheral devices such as game controllers, communication devices and input devices on a single bus.

USB stands for Universal Serial Bus, an industry-standard specification for attaching peripherals to a computer. It delivers high performance, the ability to plug in and unplug devices while the computer is running, great expandability, and a wide variety of solutions.



Signal Description

Table 6.1 shows MXM-7110 series computer on module USB signals, including pin number, signals, I/0 and descriptions.


Table 6.1 Differential Signals Impedance Requirement

Table 6.1 Differential Signals Impedance Requirement
Pin Signal Name Function Type
USB Host 0
185 USBH- USB Host Data - I/O
187 USBH+ USB Host Data + I/O
USB Host 1
193 USBH- USB Host Data - I/O
195 USBH+ USB Host Data + I/O



Design Guidelines

Figure 6-1 shows USB connections for MXM-7110 series module USB signals.


Figure 6.1 USB Connection

image: usb_connection.jpg



Low ESR Capacitor

You can hot plug USB devices. In fact, this is one of the virtues of USB relative to most other legacy interfaces. The design of the USB power-decoupling network must absorb the momentary current surge from hot plugging an unpowered device.

Reducing these values is not recommended. These capacitors should be low ESR, low inductance.



ESD or EMI suppression components

The following guidelines apply to the selection and placement of common mode chokes and ESD protection devices. Some USB designs will need additional ESD or EMI suppression components on the USB data lines. These are most effective when they are placed near the external USB connector and grounded to a low-impedance ground plane. MXM-7110 series modules equips with two USB ports. Some people implement three or four ports. If the application needs more than two USB ports, a low cost USB hub IC can be integrated onto the carrier board and connected to the USB0 or USB1 ports on the MXM-7110 series module. This provides a larger number of USB ports.

A design may include a RC filter to provide a stuffing option in the event the filter is needed to pass EMI testing. Figure 6-2 shows the schematic of a typical RC filter and ESD suppression components. The RC filter should be placed as close as possible to the USB connector signal pins.


Figure 6.2 RC filter

image: lc_filter.jpg



Note:

ESD protection and RC filter are only needed if the design does not pass EMI or ESD testing. Basically, it is recommended to add them in the USB 1.1 interface. Footprints for ESD suppression components should be included in the event that a problem occurs (General routing and placement guidelines should be followed).



Layout Guidelines

Differential Pairs

The USB data pairs (ex. USB0H+ and USB0H-) should be routed on the carrier board as differential pairs, with a differential impedance of 90 Ω. PCB layout software usually allows determining the correct trace width and spacing to achieve this impedance, after the PCB stack-up configuration is known.

As per usual differential pair routing practices, the two traces of each USB pair should be matched in length and kept at uniform spacing. Sharp corners should be avoided. At the MXM module and connector ends of the routes, loop areas should be minimized. USB data pairs should be routed as far from other signals as possible.


Figure 6.3 USB Layout Guidelines

image: usb_layout_guidelines.jpg



Cross a plane split

The mistake shown here is where the data lines cross a plane split. This causes unpredictable return path currents and would likely cause a signal quality failure as well as creating EMI problems.


Figure 6.4 Violations of Proper Routing Techniques

image: violation_routing_technique.jpg



Stubs

A very common routing mistake is shown in Figure 6-5. Here the designer could have avoided creating unnecessary stubs by proper placement of the pull down resistors over the path of the data traces. Once again, if a stub is unavoidable in the design, no stub should be greater than 200 mils. Here is another example where a stub is created that could have been avoided. Stubs typically cause degradation of signal quality and can also affect EMI.



Figure 6.5 Creating unnecessary stubs

image: unnecessary_stubs.jpg



AC-Link Interface

MXM-7110 series module provides an AC Link interface which is compliant to AC97 Rev. 2.3 Specification. Please establish the AC97 CODEC on the carrier board for your application.



Signal Description

Table 6.2 shows MXM-7110 series module AC-Link signals, including pin number, signals, I/O and descriptions.


Table 6.2 Audio Signal Description

Table 6.2 Audio Signal Description
Pin Signal Name Function Type
AC97
16 AC_SYNC 48kHz fixed rate sample sync O
18 AC_BIT_CLK 12.288MHz serial data clock I/O
20 AC_nRESET AC'97 Master H/W Reset O
22 AC_SDATA_IN AC'97 input stream I
24 AC_SDATA_OUT AC'97 output stream O


Design Guidelines

Figure 6-6 shows the connections for MXM module AC link signals. AC_BITC_LK is a 12.288 MHz clock driven by a crystal to the MXM module digital controller and to the codec.


Figure 6.6 AC-Link Connections