Pxa320 based com

MXM-8110/MXM-8310 Computer on Module

[edit] Introduction

This Chapter gives background information on the MXM-8110 and MXM-8310 computer on module products from Embedian.

Section include：

• MXM computer on Module Family
• Comparison of MXM series Computer on Module Family
• Block diagram
• Snapshots

[edit] MXM-8110 and MXM-8310 XSCALE Based Computer on Module

MXM8110/MXM-8310 PXA320 is a tiny and powerful Ethernet enable small module in world first MXM form factor. It is based on the new Marvell XScale PXA320 (Monahans-P) processor and runs at 806MHz. The computer on module power consumption is optimized using the new Wireless Intel Speedstep Technology. With small size (66mmx50mm) and very power saving, MXM-8310 features state of the art technology, aiming at low power systems that require high CPU performance and space critical application. Most importantly, all RISC-based modules will be pin-to-pin compatible from Embedian to save customers design efforts and extend their product lifetime.

Based on Marvell PXA320 (Monahans-P) XSCALE SoC, the MXM-8110/MXM-8310 series computer on module provides with all the interfaces needed in a modern embedded device. It includes 128MB of NAND Flash, and 64MB/128MB of SDRAM, TFT LCD interface, two USB host interface, Ethernet interface, three RS232 interface, CF interface, IDE interface, AC97 Audio Interface, IIC, PWM and SPI through a 242-pin MXM golden finger connector as interface. It also includes a sophisticate power management mechanism. The small in size makes system integrators and manufacturers flexible in designing their product line with different shapes to make the products fast time to market.

A 242-pin golden finger connector enables the MXM-8110/MXM-8310 series computer on module to interface with the OEM's custom circuitry, and with an evaluation carrier board that is supplied with Embedian's evaluation kit. The evaluation carrier board includes a LCD panel, headers and connectors for all interfaces.

MXM-8000 series computer on includes MXM-8110 and MXM-8310.

[edit] Comparison of MXM-8000 Series Computer on Module

MXM series computer on module families host a Marvell PXA320 (Monahans-P)SOC (XSCALE core) clocking at 806Mhz with MMU and DFI BUS.

There are two products (MXM-8110 and MXM-8310) so far in this product category. The differences between each model are listed in the following table 1.1. Users could decide the best features and choose the right model number.

Table 1.1

Note

1. (*) The differences between MXM-8110 and MXM-8310 are CPU cpeed and Mobile DDR capacity.
2. (**)128MB Mobile DDR is available from MXM-8110 and 256MB Mobile DDR is available from MXM-8310 by project based.

The MXM-8110/MXM-8310 computer on modules are designed in a 66mm x 50mm factor.

[edit] MXM-8110/MXM-8310 Series Block Diagram

The following diagram illustrates the system organization of the MXM-8110 and MXM-8310. Arrows indicate direction of control and not necessarily signal flow.

Figure 1.1 MXM-8110/MXM-8310 Computer on Module Block Diagram

[edit] Snapshots

Figure 1.2 Snapshot of MXM-8110/MXM-8310 Series Computer on Module

Details for this diagram will be explained in the following chapters.

[edit] Specifications

This Chapter contains specifications of MXM-8110/MXM-8310 computer on module.

Section include：

• Functional specifications
• Mechanical specifications
• Electrical specifications
• Environmental specifications
• MTBF
• EMI/RFI and ESD protection

[edit] Functional Specification

Processor

• Marvell PXA320 (Monahans-P)
• 32-bit XSCALE Core complies with ARM Architecture V5TE instruction set
• Clock Rates up to 624Mhz/806Mhz (MXM-8110/MXM-8310)
• 260Mhz System BUS
• 256KB L2 Cache
• Booting from NAND Flash
• Intel Wireless MMX 2 and SSE integer instruction capability
• 2D Graphic Acceleration
• Ultra-Low Power Consumption

Power Supply

• Single input +5V DC power from 242-pin interface
• Real-time clock battery powered

Memory

• Onboard 128MB NAND Flash (Large Block)
• Onboard 64MB/128MB Mobile DDR memory (32-bit, 128MB/256MB) Mobile DDR available on project based (MXM-8110/MXM-8310)
• CompactFlash(CF), Type I and Type II, 3.3V, True IDE Mode

Universal Serial Bus (USB)

• Chipset: CPU internal
• Two USB 1.1 host ports (12Mbit/s speed)
• OHCI Rev. 1.0 Compliance
• USB legacy keyboard, mouse and hard disk support

USB 2.0 Device

• Chipset: CPU internal
• USB2.0 High Speed
• USB2.0 UTMI interface (need a UTMI transceiver on carrier board)
• Compatible with USB specification version 2.0 and UTMI (Universal Transceiver Macrocell Interface)

COM Port

• Chipset: CPU internal
• Three RS232 ports
• Two with TX, RX, CTS and RTS, One with Full RS232 signals

Ethernet

• Chipset：Davicom DM9000B
• One 10/100Mbps Ethernet (MAC integrated), RJ-45 connector onboard
• Compliance with IEEE 802.3u 100Base-TX and 802.3 10Base –T
• Compliance with IEEE 802.3u auto-negotiation protocol for automatic link-type selection
• Full-duplex/half -duplex capability
• Supports IEEE 802.3x full duplex flow control
• Support Auto-MDIX

CompactFlash(CF) Interface

• Chipset: CPU Card Bus
• Type I and Type II, 3.3V
• True IDE mode and I/O mode

IDE Interface

• Chipset: CPU Card Bus
• ATA PIO mode

AC97 Audio-Codec Interface

• Chipset: CPU AC-link or IIS interface
• Support 16-bit Sample
• AC97 version 2.3 compliance interface
• 1-ch stereo PCM inputs/ 1-ch stereo PCM outputs1-ch MIC input
• Advanced Linux Sound Architecture (ALSA) API support

Discrete I/O

• 12 general-purpose digital I/Os
• 8 External interrupt to eliminate performance hogging polling

IIC Interface

• Chipset: CPU internal
• 1-ch Multi-Master IIC-Bus
• Serial, 8-bit oriented and bi-directional data transfers can be made at up to 100 Kbit/s in Standard mode or up to 400 Kbit/s in Fast mode.

SPI Interface

• Chipset: CPU internal
• Compatible with 2-ch Serial Peripheral Interface Protocol version 2.11
• 2x8 bits Shift register for Tx/Rx
• DMA-based or interrupt-based operation

Watchdog Timer (WDT)

• Chipset：CPU internal
• 16-bit Watchdog Timer
• Interrupt Request or System Reset at Timeout

CPU Video Graphic Array (VGA)

• Chipset：CPU internal
• TFT Panel Support
• Up to 1024x768 resolutions
• 16-bit 65,000 color support
• TTL and 18-bit interface

Pulse Width Modulation (PWM)

• Chipset：CPU Internal
• 4-ch 16-bit Timer with PWM / 1-ch 16-bit internal timer with DMA-based or interrupt-based operation
• Programmable duty cycle, frequency, and polarity

Touch Panel or ADC Interface

• Chipset：CPU Internal ADC
• 10-bit CMOS ADC
• 4-wire ADC interface

DFI Bus (ISA-like Interface)

• Chipset：CPU internal
• For add-on companion chip
• 8/16-bit only

Real Time Clock (RTC)

• RTC power interface

JTAG

• Testing and debugging interface

BIOS

• Blob
• Serial or Ethernet TFTP download
• Booting from NAND Flash Technology

Operating System

• Linux 2.6.26.2 (Debian ARM Linux)
• Windows CE 5.0

[edit] Mechanical Specification

The MXM-8110/MXM-8310 embedded XSCALE computer boards is very tiny (66mm x 50mm) in form factor. This section describes the component dimensions and mounting of the board. Detailed drawings are available from Embedian for production customers.

[edit] Dimensions

Length x Width: 66mm x 50mm (2.60" x 1.97")

[edit] Extended Temperature Ordering Information

MXM-8110-I/MXM-8310-I (-40^oC ~ 80^oC)

[edit] Mechanical Drawing

The following mechanical drawing specifies the dimension of MXM-8110/MXM-8310 computer on module, as well as key components on the board. All dimensions are in mini-meters.

Top View

Bottom View

[edit] Mounting Holes

Two mounting holes are provided for mounting. The diameter of the holes is 4.0 mm. (The diameter of the ring is 5.5mm.) Mounting holes are plated through and connected to the module ground plane.

For reliable ground connections, use locking washers (star or split) when securing an MXM-8110/MXM-8310 computer on module in a carrier board. Make sure that the washers do not extend beyond the limits of the pads provided (5.5mm). A M3, F head, 4mm long, 5mm in diameter, and 1mm head thick screw is recommended.

[edit] Clearances

The MXM-8110/MXM-8310 computer on module has a low profile. Key clearances are as follows:

Height on Top

Max 2.8 mm (110.24 mil)

Height on Bottom

Maximum 2.4 mm (94.49 mil)

Board Thickness

1.2 mm

Clearance over Top and Bottom

6.4 mm

[edit] Weight

About 20g

[edit] Electrical Specification

[edit] Supply Voltages

+5V DC power (+/- 5%)

MXM-8110/MXM-8310 computer on module require a +5V power supply from custom carrier board.

[edit] Supply Voltage Ripple

100mV peak to peak 0 - 20MHz

[edit] Supply Current (Typical)

MXM-8110/MXM-8310 series computer on module is a low power consumption computer on module. The power-consumption tests were executed to give an overview of the electrical conditions for several operational states.

Following table lists the typical power consumption of each MXM-8110/MXM-8310 computer on module. All I/Os are up under the testing environment.

Table 2.1 Power Consumption of MXM-8110/MXM-8310 Computer on Module

Note:

1. The above data is module only and the tested LCD is 640x480 TFT panel.

[edit] Real-Time Clock (RTC) Battery

• Voltage range: 1.8V – 3.6V (Typical@3.0V)
• Quiescent current: max. 3uA@3.0 V

[edit] CF

• 3.3V only

[edit] LCD

The LCD signal control voltage specification is as follows.

• +3.3/5V for TTL level LCD Panel

[edit] Environmental Specification

[edit] Temperature

• Operating(*): -5^oC to +70^oC(**) (with appropriate airflow)
• Non-operating: -10^oC to +85^oC (non-condensing)

Note:

• (*) Extended temperature (-40^oC ~ 80^oC) option is available, the part number is MXM-8110-I/MXM-8310-I or XPC-8112-I/XPC-8132-I.
• (**) The maximum operating temperature is the maximum measurable temperature on any spot on the module's surface. You must maintain the temperature according to the above specification.

[edit] Humidity

• Operating: 0 to 95% (non-condensing)
• Non-operating: 0 to 95% (non-condensing)

[edit] MTBF

• System MTBF (hours) : >100,000 hours

The above MTBF (Mean Time Between Failure) values were calculated using a combination of manufacturer's test data, if the data was available, and a Bellcore calculation for the remaining parts. The Bellcore calculation used is "Method 1 Case 1". In that particular method the components are assumed to be operating at a 50 % stress level in a 40^o C ambient environment and the system is assumed to have not been burned in. Manufacturer's data has been used wherever possible. The manufacturer's data, when used, is specified at 50^oC, so in that sense the following results are slightly conservative. The MTBF values shown below are for a 40^oC in an office or telecommunications environment. Higher temperatures and other environmental stresses (extreme altitude, vibration, salt water exposure, etc.) lower MTBF values.

[edit] EMI/RFI and ESD Protection

The MXM-8110/MXM-8310 computer on module incorporates a number of standard features that protect it from electrostatic discharge (ESD) and suppress electromagnetic and radio-frequency interference (EMI/RFI). Transient voltage suppressors, EMI fences, filters on I/O lines and termination of high-frequency signals are included standard on all systems.

The module provides surge protection on the input power lines of itself. This is especially important if the power supply wires will be subject to EMI/RFI or ESD. If the system incorporates other external boards, it is the responsibility of the designer or integrator to provide surge protection on the system input power lines.

[edit] Hardware Reference

This section gives details of the hardware pin out assignment of the MXM-8110/MXM-8310 computer on module.

[edit] Connector Type

The MXM-8110/MXM-8310 computer on module uses MXM 242-pin golden finder as interface. The connector on module is called header and the connector on custom board is called socket.

Figure 3.1 CN1 Socket connector Type (Mating Connector: B33P102-0013 (Speed Tech), AS0B326-S78N-7F (Foxconn) or compatible)

Figure 3.2 CN2 Socket Type (Connector : FPC connector Pitch 0.5mm)

[edit] Connector Mechanical Drawing

The detail connector mechanical drawing is as follows.

Figure 3.3 CN1 Socket Connector Mechanical Drawing

Figure 3.4 CN2 Socket Connector Mechanical Drawing

[edit] Connector Location

MXM series computer on module use 242-pin MXM form factor golden finger connectors CN1 and a FPC connector (Pitch 0.5mm)CN2 as an interface to connect with carrier board. The CN2 is mainly for keypad related.

Figure 3.5 Connector Location I

Figure 3.6 Connector Location II

[edit] Connector Pin Assignments

The following tables describe the electrical signals available on the connectors of the MXM-8110/MXM-8310 computer on module. Each section provides relevant details about the connector including part numbers, mating connectors, signal descriptions and references to related chapters. For precision measurements of the location of the connectors on the module, refer to section 2.2.2. for mechanical drawing.

Legend:

Signal Types:

[edit] CN1 Connector (Golden Finger)

Address bus, data bus, CompactFlash, IDE, JTAG, Ethernet, chip select signal, external interrupt signals and all other CPU related are from CN1.

The following table shows the pin outs of CN1 connector.

Table 3.1 CN1 Connector (Bottom Side)

Table 3.1	CN1 Connector (Bottom Side)
Description	Mating Connector : B33P102-0013 (Speed Tech), AS0B326-S78N-7F (Foxconn) or compatible
Header	Pin	Signal Name	Function	Type
	4-wire touch screen
1	XP	Plus X-axis on-off control signal	AI
3	XM	Minus X-axis on-off control signal	AI
5	YP	Plus Y-axis on-off control signal	AI
7	YM	Minus Y-axis on-off control signal	AI
ADC Input
9	RSVD	Reserved	NC
11	RSVD	Reserved	NC
13	RSVD	Reserved	NC
15	RSVD	Reserved	NC
Reserved Pin
17	RSVD	Reserved	NC
19	RSVD	Reserved	NC
21	RSVD	Reserved	NC
23	RSVD	Reserved	NC
Key
Key
Key
Key
Key
Key
37	RSVD	Reserved	NC
39	RSVD	Reserved	NC
DMA
41	RSVD	Reserved	NC
43	DMADREQ0	External DMA request	I
Address Bus
45	ADDR0	Address Bus	O
47	ADDR1	O
49	ADDR2	O
51	ADDR3	O
53	ADDR4	O
55	ADDR5	O
57	ADDR6	O
59	ADDR7	O
61	ADDR8	O
63	ADDR9	O
65	ADDR10	O
67	ADDR11	O
69	ADDR12	O
71	ADDR13	O
73	ADDR14	O
75	ADDR15	O
77	GND	Ground Power	P
Address Bus
79	ADDR16	Address Bus	O
81	ADDR17	O
83	ADDR18	O
85	ADDR19	O
87	ADDR20	O
89	ADDR21	O
91	ADDR22	O
93	ADDR23	O
95	ADDR24	O
97	ADDR25	O
99	RSVD	Reserved	NC
Card BUS Related
101	nPCE1	Lower Byte enable for the card interface	O
103	nPCE2	Higher Byte enable for the card interface	O
105	nPREG	Attribute Memory Select for the card interface	O
107	nPIOR	Card interface I/O space output enable	O
109	nPIOW	Card interface I/O space write enable	O
111	nIOIS16	Card interface input from I/O space telling size of data bus	I
113	nPWAIT	Card interface input for inserting wait states	I
115	GND	Ground	P
Chip Select
117	nGCS0	Chip Select	O
119	nGCS1	O
121	nGCS2	O
123	nGCS3	O
125	nGCS4	O
127	nGCS5	O
129	nWBE0	Write byte enable	O
131	nWBE1	O
133	nOE	Output Enable	O
135	nWE	Write Enable	O
Data Bus
137	DATA0	DATA[15:0] INPUT DATA DURING MEMORY READ AND OUTPUT DATA DURING MEMORY WRITE. BUS WIDTH OF 8/16 BIT IS PROGRAMMABLE	I/O
139	DATA1	I/O
141	DATA2	I/O
143	DATA3	I/O
145	DATA4	I/O
147	DATA5	I/O
149	DATA6	I/O
151	DATA7	I/O
153	DATA8	I/O
155	DATA9	I/O
157	DATA10	I/O
159	DATA11	I/O
161	DATA12	I/O
163	DATA13	I/O
165	DATA14	I/O
167	DATA15	I/O
169	nWAIT	nWAIT requests	I
171	CLKOUT	Clock Output	O
173	WAKEUP	Wakeup requests	I
175	nRESET_IN	Reset PXA320	ST
177	nRESET_OUT	Reset External Device	O
179	RSVD	Reserved	NC
181	RSVD	Reserved	NC
183	One Wire	1-Wire bidirectional data bus	IO
USB Host 1
185	USBH-	USB Host Data -	I/O
187	USBH+	USB Host Data +	I/O
Reserved Pin
189	RSVD	Reserved	NC
191	RSVD	NC
USB Host 2
193	USBH-	USB Host Data -	I/O
195	USBH+	USB Host Data +	I/O
197	GND	Ground Power	P
USB Device 2.0 UTMI Interface
199	U2D_XCVR_SELECT	UTMI Transceiver Select	O
201	U2D_TERM_SELECT	UTMI Termination Select	O
203	U2D_SUSPENDM_X	UTMI Suspend	O
205	UTM_LINESTATE1	UTMI Line State	I
207	UTM_LINESTATE0	UTMI Line State	I
209	U2D_OPMODE1	UTMI Operating Mode	O
211	U2D_OPMODE0	UTMI Operating Mode	O
213	UTM_CLK	UTMI Clock	I
215	U2D_RESET	UTMI Reset	O
217	U2D_TXVALID	UTMI Transmit Valid	O
219	UTM_TXREADY	UTMI Transmit Data Ready	I
221	UTM_RXVALID	UTMI Receive Data Valid	I
223	UTM_RXACTIVE	UTMI Receive Active	I
225	U2D_RXERROR	UTMI Receive Error	NC
227	RSVD	NC
229	RSVD	O
231	U2D_DATA0	UTMI Data Bus	IO
233	U2D_DATA1	UTMI Data Bus	IO
235	U2D_DATA2	UTMI Data Bus	IO
237	U2D_DATA3	UTMI Data Bus	IO
239	U2D_DATA4	UTMI Data Bus	IO
241	U2D_DATA5	UTMI Data Bus	IO

Table 3.2 CN1 Connector (Top Side)

Table 3.2	CN1 Connector (Top Side)
Description	Mating Connector : B33P102-0013 (Speed Tech), AS0B326-S78N-7F (Foxconn) or compatible
Header	Pin	Signal Name	Function	Type
	Reserved Pin
2	RSVD	Reserved	NC
4	RSVD	NC
JTAG
6	TMS	TAP Controller Mode Select	I
8	TDO	TAP Controller Data Output	O
10	TDI	TAP Controller Data Input	I
12	TCK	TAP Controller Clock	I
14	nTRST	TAP Controller Reset	I
AC97
16	AC_SYNC	48kHz fixed rate sample sync.	O
18	AC_BIT_CLK	12.288MHz serial data clock	IO
20	AC_nRESET	AC'97 Master H/W Reset	O
22	AC_SDATA_IN	AC'97 input stream	I
24	AC_SDATA_OUT	AC'97 output stream	O
Key
Key
Key
Key
Key
Key
Power Input
38	EXT5V	DC in 5V	P
40	EXT5V	DC in 5V	P
42	EXT5V	DC in 5V	P
44	EXT5V	DC in 5V	P
CPU LCD
46	RSVD	Reserved	NC
48	LDD11	LCD data bus RED0 (LSB)	O
50	LDD12	LCD data bus RED1	O
52	LDD13	LCD data bus RED2	O
54	LDD14	LCD data bus RED3	O
56	LDD15	LCD data bus RED4(MSB)	O
58	LDD5	LCD data bus GREEN0(LSB)	O
60	LDD6	LCD data bus GREEN1	O
62	LDD7	LCD data bus GREEN2	O
64	LDD8	LCD data bus GREEN3	O
66	LDD9	LCD data bus GREEN4	O
68	LDD10	LCD data bus GREEN5(MSB)	O
70	RSVD	Reserved	NC
72	LDD0	LCD data bus BLUE0 (LSB)	O
74	LDD1	LCD data bus BLUE1	O
76	LDD2	LCD data bus BLUE2	O
78	LDD3	LCD data bus BLUE3	O
80	LDD4	LCD data bus BLUE4(MSB)	O
82	VCLK	LCD clock signal	O
84	HSYNC	Horizontal synchronous signal	O
86	VSYNC	Vertical synchronous signal	O
88	VDEN	Data enable signal	O
90	GND	Grpund Power	P
PWM
92	PWM0	Pulse Width Modulation Output	O
94	PWM1	O
96	PWM2	O
98	PWM3	O
IIC
100	IICSCL	IIC-bus clock	IO
102	IICSDA	IIC-bus data	IO
SSP (**)
104	SSP3_RXD	Synchronous Serial Protocol Receive Data	I
106	SSP3_TXD	Synchronous Serial Protocol Transmit Data	O
108	SSP3_SCLK	Synchronous Serial Protocol Serial Clock	IO
110	SSP3_SFRM	Synchronous Serial Protocol Serial Frame Indicator	IO
112	SSP4_RXD	Synchronous Serial Protocol Receive Data	I
114	SSP4_TXD	Synchronous Serial Protocol Transmit Data	O
116	SSP4_SCLK	Synchronous Serial Protocol Serial Clock	IO
118	SSP4_SFRM	Synchronous Serial Protocol Serial Frame Indicator	I
Interrupt
120	EXT_INT1	External interrupt request	I
122	EXT_INT2	I
124	EXT_INT3	I
126	EXT_INT4	I
128	EXT_INT5	I
130	EXT_INT6	I
132	EXT_INT7	I
134	EXT_INT8	I
136	GND	Ground Power	I
GPIOs
138	GPIO1	General input/output ports	IO
140	GPIO2	IO
142	GPIO3	IO
144	GPIO4	IO
146	GPIO5	IO
148	GPIO6	IO
150	GPIO7	IO
152	GPIO8	IO
154	GPIO9	IO
156	GPIO10	IO
158	GPIO11	IO
160	GPIO12	IO
162	VCCIO_PWREN	External Device Power Control	O
164	VCCLCD_PWREN	Panel Power Control	O
166	BACKLIGHT_EN	Panel Backlight Control	O
168	LCD_PWREN	Panel Signal Control	O
170	BBAT	RTC Battery Power(DC 3V)	P
SD Card(*)
172	SD_nCD	SD Insert Detect	I
174	SD_WP	SD Write Protect	I
176	SDCLK	SD Clock	O
178	SDCMD	SD receive response/ transmit command	O
180	SDDAT0	SD receive/transmit data	IO
182	SDDAT1	SD receive/transmit data	IO
184	SDDAT2	SD receive/transmit data	IO
186	SDDAT3	SD receive/transmit data	IO
188	GND	Ground Power	P
Reserved Pin
190	RSVD	Reserved	NC
192	RSVD	NC
UART
194	nRI1	UART ring indicator input signal	I
196	nDCD1	UART data carrier detect input signal	I
198	nDSR1	UART data set ready input signal	I
200	nDTR1	UART data terminal ready output signal	O
202	nCTS1	UART clear to send input signal	I
204	nRTS1	UART request to send output signal	O
206	RXD1	UART receives data input	I
208	TXD1	UART transmits data output	O
210	nCTS3	UART clear to send input signal	I
212	nRTS3	UART request to send output signal	O
214	RXD3	UART receives data input	I
216	TXD3	UART transmits data output	O
218	nCTS2	UART clear to send input signal	I
220	nRTS2	UART request to send output signal	O
222	RXD2	UART receives data input	I
224	TXD2	UART transmits data output	O
Ethernet
226	LANLED1	Ethernet Speed LED	O
228	LANLED2	Ethernet Link LED	O
230	AVDD18	1.8V For Transformer	P
232	TX-	Ethernet Transmits data-	O
234	TX+	Ethernet Transmits data+	O
236	AGND	Ethernet Ground	P
238	RX-	Ethernet Receives data-	I
240	RX+	Ethernet Receives data+	I
242	AVDD18	1.8V For Transformer	P

(*)As of now, Linux driver is not supported.

(**)SSP can also be congigured as SPI by software.

[edit] CN2 Connector (For Keypad)

MXM-8110/MXM-8310 has a dedicated keypad interface from CN2. If your device is not using the keypad, users can skip this part.

The following table shows the pin outs of CN2 connector.

Table 3.3 CN2 Connector

Table 3.3	CN2 Connector
Description	Connector: FPC connector (Pitch 0.5mm)
Header	Pin	Signal Name	Function	Type
	1	VCC33	DC 3.3V Output	P
2	VCC33	DC 3.3V Output	P
3	GND	Ground	P
4	GND	Ground	P
5	KP_DKIN0	Direct Key Inputs	I
6	KP_DKIN1	Direct Key Inputs	I
7	KP_DKIN2	Direct Key Inputs	I
8	KP_DKIN3	Direct Key Inputs	I
9	KP_MKIN0	Matrix Key Returns	I
10	KP_MKIN1	Matrix Key Returns	I
11	KP_MKIN2	Matrix Key Returns	I
12	KP_MKIN3	Matrix Key Returns	I
13	KP_MKIN4	Matrix Key Returns	I
14	KP_MKIN5	Matrix Key Returns	I
15	KP_MKIN6	Matrix Key Returns	I
16	KP_MKIN7	Matrix Key Returns	I
17	KP_MKOUT0	Matrix Key Outputs	O
18	KP_MKOUT1	Matrix Key Outputs	O
19	KP_MKOUT2	Matrix Key Outputs	O
20	KP_MKOUT3	Matrix Key Outputs	O
21	KP_MKOUT4	Matrix Key Outputs	O
22	KP_MKOUT5	Matrix Key Outputs	O
23	KP_MKOUT6	Matrix Key Outputs	O
24	KP_MKOUT7	Matrix Key Outputs	O

[edit] Firmware Architecture

The firmware means the software that stores in NAND flash. MXM-8110/MXM-8310 computer on module support boot from NAND flash directly. However, the evaluation kit has a NOR flash to help user restore the firmware in NAND flash. People can refer to Dual BIOS Design section for more details.

For Linux, the firmware in NAND includes u-boot, sysconfig, kernel zImage and rescue root filesystems (initrd). And for Windows CE, the firmwares in NAND includes u-boot and NK.nb0.

This chapter explains the firmware architecture of NAND flash for both opearting sytem and how to update them.

[edit] Firmware for Linux

Figure 4.1 shows the firmware architecture of Linux in NAND.

Figure 4.1 Firmware Architecture of Linux in NAND Flash

The u-boot starts from the 0th block.(0x0, 1 block = 16K). The Linux kernel zImage starts from the 12th block. (0xc) The sysconfig stores the system configuruation like IP address, default drivers to be load, default services,,,,.etc. and starts from the 128th block. (0x80) The rescue file system is a small file system for rescue purposed and load the minimum set drivers and starts from the 256th block. (0x100) There are about 44MB unsed in NAND for users.

Users need a CF card or hard drive with root file system installed to boot up the complete system. (Users can also build his own smaller root filesystems.) The will be described at Backup and Restore Root File Systems section.

Users can update the firmware under u-boot or Linux root filesystems. The Embedian factory default is fimware pre-installed. Unless necessary, Embedian doesn't recommend you update firmware since the system might not boot anymore if you did wrong operation. (If you develop your own u-boot and kernel, you will need to do that.) There are two ways to update firmware. Following tells howto.

[edit] Update firmware under u-boot

You can update firmware under u-boot command prompt using Ethernet tftp download. Please be careful expecially when update u-boot itself or the system might not boot anymore. In case that the u-boot is gone, please go to next chapter and use NOR boot to restore the u-boot.

Before doing that, you need a tftp server program (there are many open source tftp server that you can use.) and install the tftp server under your Windows or Linux host PC. Please put the uboot.bin, zImage.dat, sysconfig.img and nand.img files (they are file name of u-boot, kernel zImage, sysconfig and initrd respectyively.) under tftp root directory.

Then go to u-boot command prompt. To do that, press any key when booting.

We recommend you erase the firmware in NAND first.

# nande 0xc 0x2000000

This will erase the firmware in NAND except u-boot.

If you want to erase all firmwares including of u-boot, you can

# nande 0x0 0x2000000

Now you have erase the u-boot, kernel zImage, sysconfig and initrd.

Next, ou need set up the IP address of your tftp server and device first.

# setenv ipaddr xxx.xxx.xxx.xxx

# setenv serverip xxx.xxx.xxx.xxx

# saveenv

For Example:

ipaddr 192.168.1.2

serverip 192.168.1.121

Note:

• Make sure that the ipaddr for device and serverip for Windows (or Linux) PC are in the same network domain.

Next, you can update the uboot.bin, zImage.dat, sysconfig.img and nand.img.

# tftp 30000000 uboot.bin

# nandw 0x0 0x1c000 30000000

# tftp 30000000 zImage.dat

# nandw 0xc 0x190000 30000000

# tftp 30000000 sysconfig.img

# nandw 0x80 0x200000 30000000

# tftp 30000000 nand.img

# nandw 0x100 0x1000000 30000000

Reboot, and now you have your firmware update.

[edit] Update firmware under Linux root file systems

You can also use Linux "dd" command at root file system. You need a CF card or hard drive with root file system installed and plug into devices. Copy the u-boot.bin, zImage and initrd.img (They are the file name of u-boot, kernel zImage and initrd.) into / directory. (You can ftp the files to devices.)

[root@apc7110 /]# cd /

[root@apc7110 /]# dd if=/u-boot.bin of=/dev/mtdblock/0

[root@apc7110 /]# dd if=/zImage of=/dev/mtdblock/2

[root@apc7110 /]# dd if=/initrd.img of=/dev/mtdblock/4

Reboot, and you have firmwares update.

[edit] Firmware for Windows CE 5.0

Figure 4.2 Firmware Architecture in NAND for Windows CE

Most Windows CE device using eboot as bootloader. Embedian uses u-boot still since u-boot is moch more powerful than eboot.

There are only two files (u-boot and Nk.nb0) in NAND flash. The u-boot starts from the 0th block.(0x0, 1 block = 16K). The NK.nb0 starts from the 12th block. (0xc) There are about 32MB unsed in NAND for users.

Users can update the firmware under u-boot. The Embedian factory default is fimware pre-installed. Unless necessary, Embedian doesn't recommend you update firmware since the system might not boot anymore if you did wrong operation. (If you develop your own u-boot and Nk.nb0, you will need to do that.) Following tells you how to update firmware under Windows CE system.

[edit] Update firmware under u-boot

You can update firmware under u-boot command prompt using Ethernet tftp download. Please be careful expecially when update u-boot itself or the system might not boot anymore. In case that the u-boot is gone, please go to next chapter and use NOR boot to restore the u-boot.

Before doing that, you need a tftp server program (there are many open source tftp server that you can use.) and install the tftp server under your Windows or Linux host PC. Please put the uboot.bin, zImage.dat, sysconfig.img and nand.img files (they are file name of u-boot, kernel zImage, sysconfig and initrd respectyively.) under tftp root directory.

Then go to u-boot command prompt. To do that, press any key when booting.

We recommend you erase the firmware in NAND first.

# nande 0xc 0x2000000

This will erase the firmware in NAND except u-boot.

If you want to erase all firmwares including of u-boot, you can

# nande 0x0 0x2000000

Now you have erase the u-boot, kernel zImage, sysconfig and initrd.

Next, ou need set up the IP address of your tftp server and device first.

# setenv ipaddr xxx.xxx.xxx.xxx

# setenv serverip xxx.xxx.xxx.xxx

# saveenv

For Example:

ipaddr 192.168.1.2

serverip 192.168.1.121

Note:

• Make sure that the ipaddr for device and serverip for Windows (or Linux) PC are in the same network domain.

Next, you can update the uboot.bin, Nk.nb0.

# tftp 30000000 uboot.bin

# nandw 0x0 0x1c000 30000000

# tftp 30000000 Nk.nb0

# nandw 0xc 0x2000000 30000000

Reboot, and you have your firmware update.

[edit] General PCB Design Recommendations

This section gives general description of the design recommendation of the Printed Circuit Board (PCB) for MXM-8110/MXM-8310 computer on module carrier boards. From a cost- effectiveness point of view, a four-layer board is the target platform for the carrier board design. For better quality, a six-layer or eight-layer board is preferred.

[edit] Nominal Board Stack Ups

The trace impedance typically noted (55 Ω ± 10%) is the "nominal" trace impedance for a 5-mil wide external trace and a 4-mil wide internal trace. However, some stackups may lead to narrower or wider traces on internal or external layers in order to meet the 55-Ω impedance target, that is, the impedance of the trace when not subjected to the fields created by changing current in neighboring traces. Note the trace impedance target assumes that the trace is not subjected to the EMI fields created by changing current in neighboring traces.

It is important to consider the minimum and maximum impedance of a trace based on the switching of neighboring traces when calculating flight times. Using wider spaces between the traces can minimize this trace-to-trace coupling. In addition, these wider spaces reduce settling time. Coupling between two traces is a function of the coupled length, the distance separating the traces, the signal edge rate, and the degree of mutual capacitance and inductance. In order to minimize the effects of trace-to-trace coupling, the routing guidelines documented in this Section should be followed. Also, all high speed, impedance controlled signals should have continuous GND referenced planes and cannot be routed over or under power/GND plane splits.

[edit] Four Layer Board Stackup

Figure 5-1 illustrates an example of a four-layer stack-up with 2 signal layers and 2 power planes. The two power planes are the power layer and the ground layer. The layer sequence of component-ground-power-solder is the most common stack-up arrangement from top to bottom.

Figure 5.1 Four-Layer Stack-Up

Table 5.1 Recommended Four-Layer Stack-Up Dimensions

Note:

Target PCB Thickness totals 62mil+/-10%

[edit] Six Layer Board Stack Up

Figure 5-2 illustrates an example of a six-layer stack-up with 4 signal layers and 2 power planes.

The two power planes are the power layer and the ground layer. The layer sequence of component-ground-IN1-IN2-power-solder is the most common stack-up arrangement from top to bottom.

Figure 5.2 Six-Layer Stack-Up

Table 5.2 Recommended Six-Layer Stack-Up Dimensions

Note:

Target PCB Thickness totals 62mil+/-10%

[edit] Differential Impedance Targets for Microstrip Routing

Table 5.3 shows the target impedance of the differential signals. The carrier board should follow the required impedance in this table.

Table 5.3 Differential Signals Impedance Requirement

[edit] Alternative Stack Ups

When customers choose to use different stack-ups (number of layers, thickness, trace width, etc.), the following key elements should be observed:

1. Final post lamination, post etching, and post plating dimensions should be used for electrical model extractions.
2. All high-speed signals should reference solid ground planes through the length of their routing and should not cross plane splits. To guarantee this, both planes surrounding strip-lines should be GND.
3. Recommend that high-speed signal routing be done on internal, strip-line layers. High-speed routing on external layers should be minimized in order to avoid EMI. Routing on external layers also introduces different delays compared to internal layers. This makes it extremely difficult to do length matching if routing is done on both internal and external layers.

[edit] Carrier Board Design Guidelines

This section gives detail description of the design recommendation of the MXM-8110/MXM-8310 computer on module carrier boards. It points out the rules that need to be carefully followed in circuit design and layout.

[edit] General Circuit Design Guide

This section states the circuit design guide. Please follow carefully or the system might not able to boot.

[edit] System-Wise

Please contact Embedian for this part.

[edit] Universal Serial BUS (USB)

MXM-8110/MXM-8310 computer modules provide two USB 1.1 ports.

[edit] Universal Serial Bus (USB)

The Universal Serial Bus (USB) provides a bi-directional, isochronous, hot-attachable Plug and Play serial interface for adding external peripheral devices such as game controllers, communication devices and input devices on a single bus.

USB stands for Universal Serial Bus, an industry-standard specification for attaching peripherals to a computer. It delivers high performance, the ability to plug in and unplug devices while the computer is running, great expandability, and a wide variety of solutions.

[edit] Signal Description

Table 6.1 shows MXM-8110/MXM-8310 series computer on module USB signals, including pin number, signals, I/0 and descriptions.

Table 6.1 Differential Signals Impedance Requirement

[edit] Design Guidelines

Figure 6-1 shows USB connections for MXM-8110/MXM-8310 series module USB signals.

Figure 6.1 USB Connection

[edit] Low ESR Capacitor

You can hot plug USB devices. In fact, this is one of the virtues of USB relative to most other legacy interfaces. The design of the USB power-decoupling network must absorb the momentary current surge from hot plugging an unpowered device.

Reducing these values is not recommended. These capacitors should be low ESR, low inductance.

[edit] ESD or EMI suppression components

The following guidelines apply to the selection and placement of common mode chokes and ESD protection devices. Some USB designs will need additional ESD or EMI suppression components on the USB data lines. These are most effective when they are placed near the external USB connector and grounded to a low-impedance ground plane. MXM-8110/MXM-8310 computer on module equips with two USB ports. Some people implement three or four ports. If the application needs more than two USB ports, a low cost USB hub IC can be integrated onto the carrier board and connected to the USB0 or USB1 ports on the MXM-8110/MXM-8310 series module. This provides a larger number of USB ports.

A design may include a RC filter to provide a stuffing option in the event the filter is needed to pass EMI testing. Figure 6-2 shows the schematic of a typical RC filter and ESD suppression components. The RC filter should be placed as close as possible to the USB connector signal pins.

Figure 6.2 RC filter

Note:

ESD protection and RC filter are only needed if the design does not pass EMI or ESD testing. Basically, it is recommended to add them in the USB 1.1 interface. Footprints for ESD suppression components should be included in the event that a problem occurs (General routing and placement guidelines should be followed).

[edit] Layout Guidelines

[edit] Differential Pairs

The USB data pairs (ex. USB0H+ and USB0H-) should be routed on the carrier board as differential pairs, with a differential impedance of 90 Ω. PCB layout software usually allows determining the correct trace width and spacing to achieve this impedance, after the PCB stack-up configuration is known.

As per usual differential pair routing practices, the two traces of each USB pair should be matched in length and kept at uniform spacing. Sharp corners should be avoided. At the MXM module and connector ends of the routes, loop areas should be minimized. USB data pairs should be routed as far from other signals as possible.

Figure 6.3 USB Layout Guidelines

[edit] Cross a plane split

The mistake shown here is where the data lines cross a plane split. This causes unpredictable return path currents and would likely cause a signal quality failure as well as creating EMI problems.